0.6 V

Tss(ms)

Css(nF)

6

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TPS65276

www.ti.com

SLVSC83A – AUGUST 2013 – REVISED DECEMBER 2013

Soft Start Time

The start-up of buck output is controlled by the voltage on the respective SS pin. When the voltage on the SS pin

is less than the internal 0.6-V reference, the TPS65276 regulates the internal feedback voltage to the voltage on

the SS pin instead of 0.6 V. The SS pin can be used to program an external soft-start function or to allow output

of buck to track another supply during start-up. The device has an internal pull-up current source of 6 µA that

charges an external soft-start capacitor to provide a linear ramping voltage at SS pin. The TPS65276 regulates

the internal feedback voltage according to the voltage on the SS pin, allowing VOUT to rise smoothly from 0 V to

its final regulated voltage. The total soft-start time will be calculated approximately:

(5)

Out-of-Phase Operation

In order to reduce input ripple current, Buck 1 and Buck 2 operate 180° out-of-phase. This enables the system

having less input ripple, then to lower component cost, save board space and reduce EMI.

Output Overvoltage Protection (OVP)

The device incorporates an output overvoltage protection (OVP) circuit to minimize output voltage overshoot. For

example, when the power supply output is overloaded the error amplifier compares the actual output voltage to

the internal reference voltage. If the FB pin voltage is lower than the internal reference voltage for a considerable

time, the output of the error amplifier demands maximum output current. Once the condition is removed, the

regulator output rises and the error amplifier output transitions to the steady state voltage. In some applications

with small output capacitance, the power supply output voltage can respond faster than the error amplifier. This

leads to the possibility of an output overshoot. The OVP feature minimizes the overshoot by comparing the FB

pin voltage to the OVP threshold. If the FB pin voltage is greater than the OVP threshold the high-side MOSFET

is turned off preventing current from flowing to the output and minimizing output overshoot. When the FB voltage

drops lower than the OVP threshold, the high-side MOSFET is allowed to turn on at the next clock cycle.

Bootsrap Voltage (BOOT) and Low Dropout Operation

The device has an integrated boot regulator, and requires a small ceramic capacitor between the BOOT and LX

pins to provide the gate drive voltage for the high-side MOSFET. The boot capacitor is charged when the BOOT

pin voltage is less than VIN and BOOT-LX voltage is below regulation. The value of this ceramic capacitor should

be 0.1

μF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or higher is

recommended because of the stable characteristics over temperature and voltage.

To improve drop out, the device is designed to operate at 100% duty cycle as long as the BOOT to LX pin

voltage is greater than the BOOT-LX UVLO threshold which is typically 2.1 V. When the voltage between BOOT

and LX drops below the BOOT-LX UVLO threshold the high-side MOSFET is turned off and the low-side

MOSFET is turned on allowing the boot capacitor to be recharged. In applications with split input voltage rails,

100% duty cycle operation can be achieved as long as (VIN – PVIN) > 4 V.

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