DAP041 datasheet(33/40 Pages) ONSEMI

33 / 40 page

SCY99194

http://onsemi.com

A 3 bit A/D converter with the peak detector senses the ac

input, and its output is periodically sampled and reset, in

order to follow closely the input voltage variations. The

sample and reset events are given by the output from the ac

line unplug detector. The sensed HV pin voltage peak value

is validated when no HV edges from comparator are present

after last falling edge during two sample clocks. See

Figure 63 for details.

Overcurrent Protection with Fault timer

The overload protection depends only on the current

sensing signal, making it able to work with any transformer,

even with very poor coupling or high leakage inductance.

When an overcurrent occurs on the output of the power

supply, the FB loop asks for more power than the controller

can deliver, and the CS setpoint reaches VILIM. When this

event occurs, an internal tfault timer is started: once the timer

times out, DRV pulses are stopped and the controller is either

latched off (latched protection, option A) or this latch can be

released in autorecovery mode (option B), the controller

tries to restart after tautorec. Another possibility of the latch

release is the VCC power on reset or the ac line unplug event

detected via ac detector. Therefore the latch can be released

by the end of the 1st X2 discharge event. The timer is reset

when the CS setpoint goes back below VILIM before the

timer elapses. The fault timer is also started if the driver

signal is reset by the max duty−ratio. The controller also

enters the same protection mode if the voltage on the CS pin

reaches 1.5 times the maximum internal setpoint VCS(stop)

(allows to detect winding short−circuits) or there appears

low VCC supply. See Figures 64 and 65 for the timing

diagram.

In autorecovery mode if the fault has gone, the supply

resumes operation; if not, the system starts a new burst cycle.

DAP041 Datasheet(PDF) 33 Page - ON Semiconductor