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MT9075AL Datasheet(PDF) 39 Page - Mitel Networks Corporation |
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MT9075AL Datasheet(HTML) 39 Page - Mitel Networks Corporation |
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39 / 78 page ![]() Preliminary Information MT9075A 4-167 Bit Name Functional Description 7 BPVE Bipolar Violation Error Insertion. A zero-to-one transition of this bit inserts a single bipolar violation error into the transmit PCM 30 data. A one, zero or one-to-zero transition has no function. 6 CRCE CRC-4 Error Insertion. A zero-to- one transition of this bit inserts a single CRC-4 error into the transmit PCM 30 data. A one, zero or one-to- zero transition has no function. 5 FASE Frame Alignment Signal Error Insertion. A zero-to-one transition of this bit inserts a single error into the time slot zero frame alignment signal of the transmit PCM 30 data. A one, zero or one-to-zero transition has no function. 4 NFSE Non-frame Alignment Signal Error Insertion. A zero-to-one transition of this bit inserts a single error into bit two of the time slot zero non-frame alignment signal of the transmit PCM 30 data. A one, zero or one-to-zero transition has no function. 3 LOSE Loss of Signal Error Insertion. If one, the MT9075A transmits an all zeros signal (no pulses) in every PCM 30 time slot. If zero, data is transmitted normally. 2 PERR Payload Error Insertion. A zero-to- one transition of this bit inserts a single error in the transmit payload. A one, zero or one-to-zero transition has no function. 1 --- Unused. 0 DBNCE Debounce Select. This bit selects the debounce period (1 for 14 msec.; 0 for no debounce). Note: there may be as much as 2 msec. added to this duration because the state change of the signalling equipment is not synchronous with the PCM 30 signalling multiframe. Table 28 - Error and Debounce Selection Word (Page 02H, Address 10H) Bit Name Functional Description 7-3 -- Unused. 2 LOS/LOF Loss of Signal or Loss of Frame Selection. If one, pin LOS (pin 61 in PLCC, 57 in MQFP) will go high when a loss of signal state exits (criteria as per LLOS status bit on page 03H address 18H). If low, pin LOS will go high when either a loss of signal (LLOST =1) or a loss of basic frame alignment state exits (bit SYNC on page 03H address 10H is zero). 1 ADSEQ Digital Milliwatt or Digital Test Sequence. If one, the A-law digital milliwatt analog test sequence will be selected by the Per Time Slot Control bits TTST and RTST (on page 07H and 08H). If zero, the PRBS 215-1 bit error rate test sequence will be selected by the Per Time Slot Control bits TTST and RTST. The PRBS generator is reset whenever this bit is set to 1. 0 GCI/ST GCI or ST-BUS Frame Pulse. If one, the MT9075A will transmit or receive a GCI frame pulse on pin F0b (pin 46 in PLCC, 34 in MQFP). If zero, the MT9075A will transmit or receive an ST-BUS frame pulse on F0b. Table 29 - Access Control Word (Page 02H, Address 13H) |
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