Z89136 datasheet(8/66 Pages) ZILOG

8 / 66 page

Z89135/136 (ROMless)

Low-Cost DTAD Controller

Zilog

1-8

P R E L I M I N A R Y

DS97TAD0300

A/D CONVERTER (ADC)

Figure 4 shows the input circuit of the ADC. When conver-

sion starts, the analog input voltage from the input is con-

nected to the MSB and LSB flash converter inputs as

shown in the Input Impedance CKT diagram. Shunting 31

parallel internal resistances of the analog switches and si-

multaneously charging 31 parallel 1 pF capacitors is equiv-

alent to a 400 Ohms input impedance in parallel with a 31

pF capacitor. Other input stray capacitance adds about 10

pF to the input load. Input source resistances up to 2 Ko-

hms can be used under normal operating conditions with-

out any degradation of the input settling time. For larger in-

put source resistance, longer conversion cycle times may

be required to compensate the input settling time problem.

VREF is set using the VREF + pin.

ABSOLUTE MAXIMUM RATINGS

Stresses greater than those listed under Absolute Maxi-

mum Ratings may cause permanent damage to the de-

vice. This is a stress rating only; operation of the device at

any condition above those indicated in the operational sec-

tions of these specifications is not implied. Exposure to ab-

solute maximum rating conditions for an extended period

may affect device reliability.

Figure 4. Input Impedance of ADC

CMOS Switch

on Resistance

2 - 5 k

Ω

C Parasitic

R Source

V Ref

C .5 pF

V Ref

C .5 pF

V Ref

C .5 pF

31 CMOS Digital

Comparators

Symbol

Description

Min

Max

Units

VCC

Supply Voltage (*)

–0.3

+7.0

TSTG

Storage Temp

–65

° +150°

Oper Ambient Temp

†

Notes:

Voltage on all pins with respect to GND.

† See Ordering Information.

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