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AS3695A Datasheet(PDF) 14 Page - ams AG

Part # AS3695A
Description  16 channel white LED driver for LCD backlight
PDF  34 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3695A Datasheet(HTML) 14 Page - ams AG

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AS3695A
austriamicrosystems
www.austriamicrosystems.com
Rev 1.10 / 2010-12-8
13 - 33
RegAddr: 0x13
PWMCTRL
Bit
Name
Description
Default
Acc
ess
7
FaultDetDly
Sets delay time between PWM=1 and fault detection start
0...40us
1...20us
0
r/w
6
DelayStart
Defines when new PWM-Delay value takes effect
0...Delay values are updated every VSYNC pulse
1...Delay values are updated on the next VSYNC pulse only if
HighTime or Delay value has been changed.
0
r/w
5
0
r/w
4
VSYNCdet
Enable VSYNC detection
0...VSYNC-detection OFF
1... VSYNC-detection ON. All current outpts are turned off if
VSYNC signal is missing for 100ms
0
r/w
3
VSYNCedge
Defines VSYNC trigger edge
0...VSYNC trigger on rising edge
1...VSYNC trigger on falling edge
0
r/w
2
PWMext
Select external or internal PWM signal
0...PWM signal is generated internally
1...PWM signal is applied externally at pin VSYNC
0
r/w
1
UpdateMode
Defines when internal registers are updated
0...Registers updated with rising edge of xCS
1...Registers updated with next VSYNC-edge
0
r/w
0
ClockSrc0
Clock source for internal PWM-generators
0..internal RC oscillator
1...External Pin HSYNC
0
r/w
RegAddr:
PWMperiod
0x15
0x14
Bit
Bit
Description
Default
Access
3:0
7:0
PWMper[11:0] sets PWM period
0x00, 0x00
r/w
RegAddr:
PWM1delay
0x17
0x16
Bit
Bit
Description
Default
Access
3:0
7:0
PWM1del[11:0] sets PWM1 delay
0x00, 0x00
r/w
RegAddr:
PWM2delay
0x19
0x18
Bit
Bit
Description
Default
Access
3:0
7:0
PWM2del[11:0] sets PWM2 delay
0x00, 0x00
r/w
RegAddr:
PWM3delay
0x1B
0x1A
Bit
Bit
Description
Default
Access
3:0
7:0
PWM3del[11:0] sets PWM3 delay
0x00, 0x00
r/w
RegAddr:
PWM4delay
0x1D
0x1C
Bit
Bit
Description
Default
Access
3:0
7:0
PWM4del[11:0] sets PWM4 delay
0x00, 0x00
r/w
RegAddr:
PWM5delay
0x1F
0x1E
Bit
Bit
Description
Default
Access
3:0
7:0
PWM5del[11:0] sets PWM5 delay
0x00, 0x00
r/w
RegAddr:
PWM6delay
0x21
0x20
Bit
Bit
Description
Default
Access
3:0
7:0
PWM6del[11:0] sets PWM6 delay
0x00, 0x00
r/w
RegAddr:
PWM7delay
0x23
0x22
Bit
Bit
Description
Default
Access
3:0
7:0
PWM7del[11:0] sets PWM7 delay
0x00, 0x00
r/w



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