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TMG49037 Datasheet(PDF) 43 Page - ams AG |
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TMG49037 Datasheet(HTML) 43 Page - ams AG |
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43 / 104 page  ams Datasheet Page 43 [v1-02] 2015-May-14 Document Feedback TMG4903 − Register Description IRBeam Configuration Register Two (ICONFIG2 0xA1) Figure 47: IRBeam Configuration Register Two 76 5 4 3 2 1 0 Reserved IINVERT IOUTPUT IRCDCMODE IDUTY Field Bits Description Reserved 7:6 Reserved. IINVERT 5 IRBeam Invert. If asserted, the IRBeam output is inverted. IOUTPUT 4:3 IRBeam Output Pin. Define which output pin used for IRBeam. VALUE IRBEAM OUTPUT PIN 0LDR 1 LDR (digital mode) 2INT 3GPIO IRCDCMODE 2 IRBeam Remote Control DC Mode. If asserted, the pattern is transmitted in DC mode without carrier modulation. Timing is still defined by the IBT register. IDUTY 1:0 IRBeam Duty Cycle. Define the IRBeam duty cycle. VALUE IRBEAM DUTY CYCLE 050% 1 37.5% 225% 3 12.5% |
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