Data Sheet

AD7915/AD7916

Rev. 0 | Page 17 of 26

This is useful in low jitter sampling or simultaneous sampling

applications.

When in chain mode, the AD7915/AD7916 provide a daisy-chain

feature using the SDI input for cascading multiple ADCs on a

single data line, similar to a shift register.

The mode in which the device operates depends on the SDI/CS

level when the CNV rising edge occurs. CS mode is selected if

SDI/CS is high, and chain mode is selected if SDI/CS is low. The

SDI/CS hold time is such that when SDI/CS and CNV are

connected together, chain mode is always selected. In either

mode, the AD7915/AD7916 offers the option of forcing a start

bit in front of the data bits. This start bit can be used as a busy

signal indicator to interrupt the digital host and to trigger the

data reading. Otherwise, without a busy indicator, the user must

time out the maximum conversion time prior to readback.

The busy indicator feature is enabled



in CS mode if CNV or SDI is low when the ADC

conversion ends (see Figure 38 and Figure 42).



in chain mode if SCK is high during the CNV rising edge

(see Figure 46).

CS MODE, 3-WIRE, WITHOUT BUSY INDICATOR

This mode is usually used when a single AD7915/AD7916 is

connected to an SPI-compatible digital host. The connection

diagram is shown in Figure 35, and the corresponding timing is

given in Figure 36.

With SDI/CS tied to VIO, a rising edge on CNV initiates a

conversion, selects the CS mode, and forces SDO to high

impedance. When the conversion is complete, the AD7915/

AD7916 enter the acquisition phase and power down. When

CNV goes low, the MSB is output onto SDO. The remaining data

bits are clocked by subsequent SCK falling edges. The data is valid

on both SCK edges. Although the rising edge can capture the

data, a digital host using the SCK falling edge allows a faster

reading rate, provided that it has an acceptable hold time. After

occurs first), SDO returns to high impedance.

AD7915/

AD7916

SDO

CNV

SCK

CONVERT

DATA IN

CLK

DIGITAL HOST

VIO

SDI/CS

Figure 35. CS Mode Without Busy Indicator, 3-Wire Connection Diagram (SDI High)

SDO

D15

D14

D13

D1

D0

SCK

1

2

3

14

15

16

CNV

CONVERSION

ACQUISITION

ACQUISITION

SDI/CS = 1

Figure 36. CS Mode Without Busy Indicator, 3-Wire Serial Interface Timing (SDI High)