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ADS5560 Datasheet(PDF) 21 Page - Texas Instruments |
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ADS5560 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 61 page ![]() f − Frequency − MHz −180 −160 −140 −120 −100 −80 −60 −40 −20 0 0 5 10 15 20 G022 SFDR = 92.7 dBc SINAD = 82.5 dBFS SNR = 83.2 dBFS THD = 90 dBc f − Frequency − MHz −180 −160 −140 −120 −100 −80 −60 −40 −20 0 0 5 10 15 20 G023 SFDR = 83.43 dBc SINAD = 80.2 dBFS SNR = 82.9 dBFS THD = 82.55 dBc Output Code 0 5 10 15 20 25 30 35 40 G019 RMS (LSB) = 1.424 82 83 84 85 86 87 VVCM − VCM Voltage − V 80 82 84 86 88 90 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 fIN = 5.01 MHz External Reference Mode G020 SNR SFDR 80 81 82 83 84 85 86 87 88 78 80 82 84 86 88 90 92 94 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Input Clock Amplitude − VPP G017 SNR SFDR fIN = 10.1 MHz 81 82 83 84 85 86 87 Input Clock Duty Cycle − % G018 72 76 80 84 88 92 96 35 40 45 50 55 60 65 SNR SFDR fIN = 5.01 MHz ADS5560, ADS5562 www.ti.com SLWS207B – MAY 2008 – REVISED JANUARY 2016 ADS5562 – 80 MSPS (continued) Typical values are at 25°C, AVDD = DRVDD = 3.3 V, sampling frequency = Maximum Rated, sine wave input clock, 1.5-VPP clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, internal reference mode, DDR LVDS interface, default fine gain (1 dB), 32k Point FFT (unless otherwise noted) Figure 18. Performance vs Clock Amplitude Figure 19. Performance vs Clock Duty Cycle Figure 21. Performance in External Reference Mode Figure 20. Output Noise Histogram 6.15.2 ADS5560 – 40 MSPS Typical values are at 25°C, AVDD = DRVDD = 3.3 V, sampling frequency = Maximum Rated, sine wave input clock, 1.5-VPP clock amplitude, 50% clock duty cycle, –1-dBFS differential analog input, internal reference mode, DDR LVDS interface, default fine gain (1 dB), 32k Point FFT (unless otherwise noted) Figure 22. FFT for 5 MHz, –1-dBFS Input Signal Figure 23. FFT for 20 MHz, –1-dBFS Input Signal Copyright © 2008–2016, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: ADS5560 ADS5562 |
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