MEC1322 datasheet(371/456 Pages) MICROCHIP

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DS00001719D-page 371

MEC1322

• After all channels enabled by Rpt_En[4:0] are complete, Repeat_Done_Status will be set to 1. This status bit is

cleared when the next repeating conversion cycle begins to give a reflection of when the conversion is in prog-

ress.

• As long as Start_Repeat is 1 the ADC will repeatedly begin conversion cycles with a period defined by

Repeat_Delay[15:0].

• If the delay period expires and a conversion cycle is already in progress because Start_Single was written with a

1, the cycle in progress will complete, followed immediately by a conversion cycle using Rpt_En[4:0] to control the

channel conversions.

33.10.2

SINGLE MODE

• The Single Mode conversion cycle will begin without a delay. After all channels enabled by Single_En[4:0] are

complete, Single_Done_Status will be set to 1. When the next conversion cycle begins the bit is cleared.

•If Start_Single is written with a 1 while a conversion cycle is in progress because Start_Repeat is set, the conver-

sion cycle will complete, followed immediately by a conversion cycle using Single_En[4:0] to control the channel

conversions.

33.11 EC-Only Registers

The registers listed in the Table 33-7, "Analog to Digital Converter Register Summary" are for a single instance of the

Analog to Digital Converter block. The addresses of each register listed in this table are defined as a relative offset to

the host “Base Address” defined in Table 33-6, "Analog to Digital Converter Base Address Table".

Note 33-1

The Base Address indicates where the first register can be accessed in a particular address space

for a block instance.

TABLE 33-6:

ANALOG TO DIGITAL CONVERTER BASE ADDRESS TABLE

Instance Name

Instance

Number

Host

Address Space

Base Address (

Note 33-1)

ADC

32-bit internal

address space

4000_7C00h

TABLE 33-7:

ANALOG TO DIGITAL CONVERTER REGISTER SUMMARY

Offset

00h

ADC Control Register

04h

ADC Delay Register

08h

ADC Status Register

0Ch

ADC Single Register

10h

ADC Repeat Register

14h

ADC Channel 0 Reading Register

18h

ADC Channel 1 Reading Register

1Ch

ADC Channel 2 Reading Register

20h

ADC Channel 3 Reading Register

24h

ADC Channel 4 Reading Register

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