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L7292 Datasheet(PDF) 24 Page - STMicroelectronics

Part # L7292
Description  Five buck regulators power management unit
PDF  60 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L7292 Datasheet(HTML) 24 Page - STMicroelectronics

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I2C interface
L7292
24/60
DocID028601 Rev 1
Figure 6. I2C protocol: bit order (MSB first), ACK bit, Start and Stop condition
8.3
I2C device operation
The device supports the I2C protocol. Any device that sends data on to the bus is defined to
be a transmitter, and any device that reads the data to be a receiver. The device that
controls the data transfer is known as the bus master, and the other as the slave device.
A data transfer can only be initiated by the bus master, which will also provide the serial
clock for synchronization. The device is always a slave in all communications.
8.3.1
Start condition
The start is identified by a falling edge of Serial Data (SDA) while the Serial Clock (SCL) is
stable in the high state. A Start condition must precede any data transfer command. The
device continuously monitors (except during a write cycle) Serial Data (SDA) and the Serial
Clock (SCL) for a Start condition, and will not respond unless one is given.
8.3.2
Stop condition
The Stop is identified by a rising edge of Serial Data (SDA) while the Serial Clock (SCL) is
stable and driven high. A Stop condition terminates communication between the device and
the bus master. A Read command that is followed by NoACK can be followed by a Stop
condition.
The Stop condition can be substituted by a repeated Start condition. In this case the bus
remains busy and another communication can start immediately.
8.3.3
Acknowledge bit (ACK)
The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter,
whether it is the bus master or slave device, releases Serial Data (SDA) after sending eight
bits of data. During the 9th clock pulse period, the receiver pulls Serial Data (SDA) low to
acknowledge the receipt of the eight data bits.
8.3.4
Data input
During data input, the device samples Serial Data (SDA) on the rising edge of the Serial
Clock (SCL). For the correct device operation, Serial Data (SDA) must be stable during the
rising edge of the Serial Clock (SCL), and the Serial Data (SDA) signal must change only
when the Serial Clock (SCL) is driven low.



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