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L7292 Datasheet(PDF) 45 Page - STMicroelectronics |
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L7292 Datasheet(HTML) 45 Page - STMicroelectronics |
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45 / 60 page ![]() DocID028601 Rev 1 45/60 L7292 Buck regulator description 60 11.6 PFM mode To maintain high efficiency in light-load condition the device enters automatically the PFM mode for a load current of around IDCM/2 or lower. This happens when the inductor current becomes discontinuous. During the PFM operation, the converter fixes the output voltage to the nominal DC value plus ½ Vout ripple that is affected by the output capacitor, the current ripple in the inductor and the load current. In this phase the high-side PMOS current is limited at IDCM and the pulses frequency is proportional to the load current. When the PMOS current reaches IDCM the PMOS is switched OFF while the NMOS is forced ON. This is valid until a zero current is detected, then the regulator output is set in high impedance until Vout crosses the nominal value. 11.7 Forced PWM When enabled, the buck regulator always operates in the PWM mode regardless of the output current. In the light-load the efficiency will be worse than in the PFM mode due to the inductor current becoming negative. This function enables the ability to have a constant frequency in light-load condition and also reduces the output voltage ripple. 11.8 Current limiting According to the max. load current, an ILIMIT is embedded in each regulator to protect the device and any external components from overload conditions. When the high-side PMOS current reaches the ILIMIT, the regulator output is forced in high impedance for around 1 s, allowing the inductor current to decrease to a safe level before allowing another on-time to happen. 11.9 Short-circuit protection In case the high-side PMOS current reaches the current limit and Vout falls below the short- circuit voltage threshold, the regulator is switched off permanently, until another full power- up of the whole device is performed. 11.10 Deep sleep mode This feature is enabled when the device has to provide the minimum functionality of the system, to reduce the quiescent current and to be ready to restart the operative conditions when needed. The device can be placed in the “Deep Sleep Mode” (DSM) by writing bit 7 REGCTRL = 1 in this mode. Regulator 3 is enabled - no load current, in the PFM mode. Regulators 1 - 2 - 4 - 5 are OFF. |
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