L7292 datasheet(46/60 Pages) STMICROELECTRONICS

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Buck regulator description

L7292

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DocID028601 Rev 1

In Table 24 are reported the quiescent current values: in the left column the case of all

regulators ON with no load, while the in right column the DSM condition.

During the DSM phase it is possible to enable/disable the regulators writing in the

REGCTRL register the proper enable bit. This allows the possibility to start the post DSM

phase with a different regulators setting. The DSM functionality is not enabled if POR is low.

11.11

Forced pull-down

When the regulator is disabled by a bit or forced by a POR the regulator switching node is

pulled down through a discharge MOSFET switch, in order to discharge the output voltage.

11.12

Voltage monitor

The voltage monitor of SUP is always enabled with the threshold as described in Table 9:

Voltage monitor and POR generator on page 14?. When a fault happens (2.7 V) the POR

signal is driven low, while the REGs are switched OFF only when the SUP voltage reaches

2.5 V.

The regulators voltage monitors are enabled only during the soft-start sequence until the

POR signal is asserted. After that, all PSRs voltage monitors are disabled and only “short-

circuit protection” is enabled.

11.13

Thermal protection

When die temperature reaches the overtemperature condition (> 150 °C) all the regulators

are automatically disabled, POR is asserted and the buck SW output pins are pulled low

through a discharge MOSFET switch. To avoid unstable conditions a 30 °C hysteresis is

applied. When the die temperature reaches the low threshold all the regulators start the

power up sequence following the default conditions.

Table 24. Quiescent current

Regulator

Quiescent current (no load) [

A]

DSM quiescent current (no load) [

A]

BUCK1

BUCK2

BUCK3

BUCK4

BUCK5

BIAS

TOT.

175

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