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ST2100 Datasheet(PDF) 9 Page - STMicroelectronics |
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ST2100 Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 39 page ![]() DocID025777 Rev 1 9/39 ST2100 Architecture description 39 3 Architecture description Figure 1 is the architecture overview of the STreamPlug ST2100. The internal architecture is based on several shared subsystems interconnected through a multilayer system bus. The bus structure allows different subsystem data flows to be executed in parallel improving the core platform efficiency. High performance master agents are directly interconnected with the memory controller reducing the memory access latency. Figure 1. STreamPlug ST2100 functional block diagram |
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