PEB2255 datasheet(49/374 Pages) INFINEON

Part #	PEB2255

Description	E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications

PDF	374 Pages

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Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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PEB 2255

FALC-LH V1.3

Functional Description E1/T1/J1

Data Sheet

2000-07

3.3.1.2

FIFO Structure

In transmit and receive direction of the signaling controller 64-byte deep FIFOs are

provided for the intermediate storage of data between the system internal highway and

the CPU interface. The FIFOs are divided into two halves of 32-bytes. Only one half is

accessible to the CPU at any time.

In case 16-bit data bus width is selected by fixing pin DBW to logical ‘1’ word access to

the FIFOs is enabled. Data output to bus lines D0-D15 as a function of the selected

interfacemodeisshownin Figure 7 and Figure 8. Of course, byte access is also

allowed. The effective length of the accessible part of RFIFO can be changed from

32 bytes (RESET value) down to 2 bytes by programming CCR1.RFT1...0.

Figure 7

FIFO Word Access (Intel Mode)

RFIFO

Byte 4

Byte 3

Byte 2

Byte 1

D15

D8 D7

D15

Byte 1

Byte 2

Byte 3

Byte 4

XFIFO

ITD01798

PEB2255 Datasheet(PDF) 49 Page - Infineon Technologies AG