GS1660 datasheet(28/82 Pages) SEMTECH

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GS1660 HD/SD SDI Receiver

Data Sheet

53834 - 2

September 2012

28 of 82

NOTE 1:

The part will lock into ASI in Auto mode, but could falsely unlock for some ASI

input patterns.

NOTE 2:

In Standby mode, the reclocker PLL unlocks. However, the LOCKED signal

retains whatever state it previously held. So, if before Standby assertion, the LOCKED

signal is HIGH, then during standby, it remains HIGH regardless of the status of the PLL.

4.6.1 Asynchronous Lock

The lock detection algorithm is a continuous process, beginning at device power-up or

after a system reset. It continues until the device is powered down or held in reset.

The device first determines if a valid serial digital input signal has been presented to the

device. If no valid serial data stream has been detected, the serial data into the device is

considered invalid, and the LOCKED signal is LOW.

Once a valid input signal has been detected, the asynchronous lock algorithm enters a

“hunt” phase, in which the device attempts to detect the presence of either TRS words or

DVB-ASI sync words.

By default, the device powers up in auto mode (the AUTO/MAN bit in the host interface

is set HIGH). In this mode, the device operating frequency toggles between HD and SD

rates as it attempts to lock to the incoming data rate. The PCLK output continues to

operate, and the frequency may switch between 148.5MHz, 74.25MHz, 27MHz and

13.5MHz.

When the device is operating in manual mode (AUTO/MAN bit in the host interface is

LOW), the operating frequency needs to be set through the host interface using the

RATE_DET bit. In this mode, the asynchronous lock algorithm does not toggle the

operating rate of the device and attempts to lock within a single standard. Lock is

achieved within three lines of the selected standard.

4.6.2 Signal Interruption

The device tolerates a signal interruption of up to 10

μs without unlocking, as long as no

TRS words are deleted by this interruption. If a signal interruption of greater than 10

μs

is detected, the lock detection algorithm may lose the current data rate, and LOCKED

will de-assert until the data rate is re-acquired by the lock detection block.

Table 4-4: Lock Detect Conditions

Mode of Operation

Mode Setting

Condition for Locked

Data-Through Mode

SMPTE_BYPASS = LOW

DVB_ASI = LOW

Reclocker PLL is locked.

SMPTE Mode

SMPTE_BYPASS = HIGH

DVB_ASI = LOW

Reclocker PLL is locked

2 consecutive TRS words are detected

in a 2-line window.

DVB_ASI Mode

SMPTE_BYPASS = LOW

DVB_ASI = HIGH

Bit AUTO/MAN = LOW

Reclocker PLL is locked

32 consecutive DVB_ASI words with

no errors are detected within a

128-word window.

GS1660 Datasheet(PDF) 28 Page - Semtech Corporation

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