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GS1670 Datasheet(PDF) 108 Page - Semtech Corporation |
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GS1670 Datasheet(HTML) 108 Page - Semtech Corporation |
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108 / 126 page ![]() GS1670 HD/SD SDI Receiver Data Sheet 53831 - 2 September 2012 108 of 126 208h CFG_AUD_2 RSVD 15-11 Reserved. R/W 0 SEL_PHASE_SRC 10 Selects between the Primary and Secondary embedded phase info. R/W 0 LSB_FIRSTB 9 Causes the Secondary group serial output formats to use LSB first. R/W 0 LSB_FIRSTA 8 Causes the Primary group serial output formats to use LSB first. R/W 0 FORCE_M 7 Disables M value detection and forces M value to that specified by FORCE_MEQ1001. R/W 0 FORCE_MEQ1001 6Specifies M value when FORCE_M is set. 1: M= 1.001 0: M = 1.000 R/W 0 IGNORE_PHASE5 Causes the Demultiplexer to ignore the embedded clock info in both the Primary and Secondary group audio data packets. Clock is generated based on the video format and M value. R/W 0 FORCE_ACLK128 4 Causes the core to ignore embedded clock info and derive phase information from ACLK128. R/W 0 EN_NOT_LOCKED 3 Asserts AUDIO_ERROR when locked is not asserted. R/W 0 EN_NO_VIDEO 2 Asserts AUDIO_ERROR when the video format is unknown. R/W 0 EN_NO_PHASEB 1 Asserts AUDIO_ERROR when NO_PHASEB_DATA is set. R/W 0 EN_NO_PHASEA 0 Asserts AUDIO_ERROR when NO_PHASEA_DATA is set. R/W 0 209h CFG_AUD_3 RSVD 15-3 Reserved. R/W 0 MISSING_PHASE2 Embedded phase info for chosen group missing or incorrect. R0 NO_PHASEB_DATA 1 Secondary group has invalid embedded clock information. R0 NO_PHASEA_DATA 0 Primary group has invalid embedded clock information. R0 Table 4-30:HD Audio Core Configuration and Status Registers (Continued) Address Register Name Bit Name Bit Description R/W Default |
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