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S3C72P9 Datasheet(PDF) 64 Page - Samsung semiconductor |
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S3C72P9 Datasheet(HTML) 64 Page - Samsung semiconductor |
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64 / 225 page ![]() MEMORY MAP S3C72P9/P72P9 (Preliminary Spec) 4-14 IET0, IRQT0 — INTT0 Interrupt Enable/Request Flags CPU FBCH Bit 3 2 1 0 Identifier "0" "0" IET0 IRQT0 RESET RESET Value 0 0 0 0 Read/Write R/W R/W R/W R/W Bit Addressing 1/4 1/4 1/4 1/4 .3 – .2 Bits 3–2 0 Always logic zero IET0 INTT0 Interrupt Enable Flag 0 Disable INTT0 interrupt requests 1 Enable INTT0 interrupt requests IRQT0 INTT0 Interrupt Request Flag – Generate INTT0 interrupt (This bit is set and cleared automatically by hardware when contents of TCNT0 and TREF0 registers match.) |
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