S3C72P9 datasheet(29/225 Pages) SAMSUNG

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S3C72P9/P72P9 (Preliminary Spec)

ADDRESS SPACES

2-17

POP OPERATIONS

For each push operation there is a corresponding pop operation to write data from the stack back to the source

for interrupts, the instruction IRET. When a pop operation occurs, the SP is incremented by a number determined

by the type of operation and points to the next free stack location.

POP Instructions

A POP instruction references the SP to write data stored in two 4-bit stack locations back to the register pairs and

SB register. The value of the lower 4-bit register is popped first, followed by the value of the upper 4-bit register.

After the POP has executed, the SP is incremented by two and points to the next free stack location.

RET and SRET Instructions

The end of a subroutine call is signaled by the return instruction, RET or SRET. The RET or SRET uses the SP

to reference the six 4-bit stack locations used for the CALL and to write this data back to the PC, the EMB, and

the ERB. After the RET or SRET has executed, the SP is incremented by six and points to the next free stack

location.

IRET Instructions

The end of an interrupt sequence is signaled by the instruction IRET. IRET references the SP to locate the six 4-

bit stack addresses used for the interrupt and to write this data back to the PC and the PSW. After the IRET has

executed, the SP is incremented by six and points to the next free stack location.

PC11 - PC8

PC14 - PC12

PC3 - PC0

PC7 - PC4

EMB

ERB

PSW

PC11 - PC8

PC14 - PC12

PC3 - PC0

PC7 - PC4

IS1

IS0

EMB

ERB

PSW

SC2

SC1

SC0

IRET

(SP

SP + 6)

RET or SRET

(SP

SP + 6)

POP

(SP

SP + 2)

SP + 1

SP + 2

Lower Register

Upper Register

SP + 5

SP + 6

SP + 4

SP + 3

SP + 2

SP + 1

SP + 5

SP + 6

SP + 4

SP + 3

SP + 2

SP + 1

Figure 2-8. Pop-Type Stack Operations

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