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PI6LC4830 Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation

Part # PI6LC4830
Description  HiFlex Network Clock Generator
PDF  11 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6LC4830 Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation

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1
PI6LC4830 Rev B
08/17/12
Block Diagram
Features
Î
3.3V supply voltage
Î
3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function
Î
1 LVCMOS 100/50MHz selectable
Î
25MHz crystal or differential input
Î
Low 1ps RMS max integrated phase noise design
Î
PLL Bypass mode for test
Î
32 lead 5x5mm TQFN package
Description
The PI6LC4830 is an LC VCO based low phase noise design
intended for the most demanding PCIe® 2.0 applications. Use
of the ultra-low noise LC VCO allows for much greater noise
margins than traditional solutions. This is ideal for noisy envi-
ronments.
Pin Configuration
QA_OE
QA_CMOS
QB_DIV2
QB_CMOS
QB_OE
/R
IN+
IN-
OSC
IN_SEL
REF_OUT_OE
PLL_Byps
QA0:QA2
100MHz
HCSL Outputs
PLL
/2
REF_OUT
1
2
10
9
8
7
6
5
4
3
15
14
13
31
12
25
24
17
18
19
20
21
22
23
26
27
28
29
30
QA1+
VDD_OutA_SE
GND
QA2-
QA2+
VDD_Out
QA1-
PLL_Byps
REF_OUT_OE
VDD_REF_Out
IN-
IN+
VDD_PLL
QB_DIV2
QB_OE
11
16
QA_CMOS
32
GND
PI6LC4830
HiFlexTM
Network Clock Generator
12-0238


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