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PI7C7300D Datasheet(PDF) 89 Page - Pericom Semiconductor Corporation |
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PI7C7300D Datasheet(HTML) 89 Page - Pericom Semiconductor Corporation |
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89 / 107 page  PI7C7300D 3-PORT PCI-TO-PCI BRIDGE Page 89 of 107 Pericom Semiconductor November 2005 - Revision 1.01 Bit Function Type Description 6 Delayed Read – No Data From Target R/W Controls PI7C7300D’s ability to assert P_SERR# when it is unable to transfer any read data from the target after 2 24 attempts. 0: P_SERR# is asserted if this event occurs and the SERR# enable bit in the command register is set 1: P_SERR# is not asserted if this event occurs Reset to 0 7 Reserved R/O Reserved. Returns 0 when read. Reset to 0 14.1.36 SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h Configuration Register 1 Bit Function Type Description 1:0 Clock 0 disable R/W If either bit is 0, then S1_CLKOUT [0] is enabled. If both bits are 1, the S1_CLKOUT [0] is disabled. 3:2 Clock 1 disable R/W If either bit is 0, then S1_CLKOUT [1] is enabled. If both bits are 1, the S1_CLKOUT [1] is disabled. 5:4 Clock 2 disable R/W If either bit is 0, then S1_CLKOUT [2] is enabled. If both bits are 1, the S1_CLKOUT [2] is disabled. 7:6 Clock 3 disable R/W If either bit is 0, then S1_CLKOUT [3] is enabled. If both bits are 1, the S1_CLKOUT [3] is disabled. 9:8 Clock 4 disable R/W If either bit is 0, then S1_CLKOUT [4] is enabled. If both bits are 1, the S1_CLKOUT [4] is disabled. 11:10 Clock 5 disable R/W If either bit is 0, then S1_CLKOUT [5] is enabled. If both bits are 1, the S1_CLKOUT [5] is disabled. 13:12 Clock 6 disable R/W If either bit is 0, then S1_CLKOUT [6] is enabled. If both bits are 1, the S1_CLKOUT [6] is disabled. 15:14 Clock 7 disable R/W If either bit is 0, then S1_CLKOUT [7] is enabled. If both bits are 1, the S1_CLKOUT [7] is disabled. Configuration Register 2 Bit Function Type Description 1:0 Clock 0 disable R/W If either bit is 0, then S2_CLKOUT [0] is enabled. If both bits are 1, the S2_CLKOUT [0] is disabled. 3:2 Clock 1 disable R/W If either bit is 0, then S2_CLKOUT [1] is enabled. If both bits are 1, the S2_CLKOUT [1] is disabled. 5:4 Clock 2 disable R/W If either bit is 0, then S2_CLKOUT [2] is enabled. If both bits are 1, the S2_CLKOUT [2] is disabled. 7:6 Clock 3 disable R/W If either bit is 0, then S2_CLKOUT [3] is enabled. If both bits are 1, the S2_CLKOUT [3] is disabled. 9:8 Clock 4 disable R/W If either bit is 0, then S2_CLKOUT [4] is enabled. If both bits are 1, the S2_CLKOUT [4] is disabled. 11:10 Clock 5 disable R/W If either bit is 0, then S2_CLKOUT [5] is enabled. If both bits are 1, the S2_CLKOUT [5] is disabled. 13:12 Clock 6 disable R/W If either bit is 0, then S2_CLKOUT [6] is enabled. If both bits are 1, the S2_CLKOUT [6] is disabled. 15:14 Clock 7 disable R/W If either bit is 0, then S2_CLKOUT [7] is enabled. If both bits are 1, the S2_CLKOUT [7] is disabled. 14.1.37 PORT OPTION REGISTER – OFFSET 74h Bit Function Type Description 0 Reserved R/O Reserved. Returns 0 when read. Reset to 0. |
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