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MB9B500B Datasheet(PDF) 53 Page - SPANSION |
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MB9B500B Datasheet(HTML) 53 Page - SPANSION |
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53 / 113 page  D a t a S h e e t 50 MB9B500B-DS706-00021-3v0-E, December 15, 2014 CONFIDENTIAL BLOCK DIAGRAM Flash I/F Cortex-M3 Core @80MHz(Max.) Clock Reset Generator Dual-Timer WatchDog Timer (Hardware) DMAC 8ch. On-Chip Flash 256/384/512K byte Multi Function Timer x2 Multi-Function Serial I/F 8ch. (with FIFO ch.4～7) *HW flow control(ch.4) 16-bit FreeRun Timer 3ch. 16-bit Output Compare 6ch. 16-bit Input Capture 4ch. Waveform Generator 3ch. A/D Activation Compare 3ch. 16-bit PPG 3ch. Watch Counter Unit 0 GPIO USB 2.0 (Host /Func) PHY CSV LVD External Interrupt Controller 16-pin + NMI Power On Reset TPIU ROM Table ETM SRAM0 16/24/32 Kbyte SWJ-DP SRAM1 16/24/32 Kbyte I D Sys MB9BF504B/505B/506B Base Timer 16-bit 8ch. /32-bit 4ch. MPU NVIC WatchDog Timer (Software) Security 12-bit A/D Converter Unit 1 Unit 2 TRSTX,TC KTDI,TMS TRACED[3:0], TRACECLK X0 AVCC, AVSS,AVRH AN[15:0] TIOA[7:0] TIOB[7:0] IC0[3:0] DTTI[1:0]X RTO0[5:0] FRCK[1:0] UDP0,UDM0 C TDO X1 X0A X1A SCK[7:0] SIN[7:0] SOT[7:0] INT[15:0] NMIX P0[F:0], P1[F:0], ・ ・ Px[x:0], INITX USBVCC MODE-Ctrl IRQ-Monitor PIN-Function-Ctrl MD[1:0] Regulator QPRC 2ch. AIN[1:0] BIN[1:0] ZIN[1:0] LVD Ctrl CAN CAN CRC Accelerator TX0,RX0 TX1,RX1 IC1[3:0] USB Clock ctrl CAN Prescaler PLL ADTG[8:0] RTS4 CTS4 External Bus IF MAD[24:0] MDATA[15:0] MCSX[7:0], MOEX,MWEX, MNALE, MNCLE MNWEX, MNREX, MDQM[1:0] UHCONX RTO1[5:0] PLL CLK CR 100kHz Source Clock CROUT Main Osc Sub Osc CR 4MHz MEMORY SIZE See " Memory size" in "PRODUCT LINEUP" to confirm the memory size. |
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