AD8104 datasheet(31/36 Pages) AD

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Data Sheet

AD8104/AD8105

Rev. A | Page 31 of 36

operation as well, as there is a common-mode-to-differential

gain conversion that becomes greater at higher frequencies.

During operation of the AD8104/AD8105, transient currents

flow into the VOCM net from the amplifier control loops.

Although the magnitude of these currents are small (10 µA to

20 µA per output), they can contribute to crosstalk if they flow

through significant impedances. Driving VOCM with a low

impedance, low noise source is desirable.

Power Dissipation

Calculation of Power Dissipation

AMBIENT TEMPERATURE (°C)

TJ = 150°C

Figure 70. Maximum Die Power Dissipation vs. Ambient Temperature

The curve in Figure 70 was calculated from

AMBIENT

MAX

JUNCTION

MAX

−

(1)

As an example, if the AD8104/AD8105 is enclosed in an envi-

ronment at 45°C (TA), the total on-chip dissipation under all

load and supply conditions must not be allowed to exceed 7.0 W.

When calculating on-chip power dissipation, it is necessary to

include the rms current being delivered to the load, multiplied

by the rms voltage drop on the AD8104/AD8105 output

devices. For a sinusoidal output, the on-chip power dissipation

due to the load can be approximated by

(

)

RMS

OUTPUT

RMS

UTPUT

POS

OUTPUT

−

For nonsinusoidal output, the power dissipation should be

calculated by integrating the on-chip voltage drop multiplied by

the load current over one period.

The user can subtract the quiescent current for the Class AB

output stage when calculating the loaded power dissipation. For

each output stage driving a load, subtract a quiescent power

according to

(

)

QUIESCENT

OUTPUT

NEG

POS

OUTPUT

−

where IOUTPUT, QUIESCENT = 1.65 mA for each single-ended output pin.

For each disabled output, the quiescent power supply current in

VPOS and VNEG drops by approximately 9 mA.

QNPN

QPNP

VNEG

VPOS

VOUTPUT

IOUTPUT

IOUTPUT, QUIESCENT

Figure 71. Simplified Output Stage

Example

For the AD8104/AD8105, in an ambient temperature of 85°C,

with all 16 outputs driving 1 V rms into 100 Ω loads and power

supplies at ±2.5 V, follow these steps:

1. Calculate power dissipation of AD8104/AD8105 using data

sheet quiescent currents. Disregard VDD current, as it is

insignificant.

(

) (

)

VNEG

NEG

VPOS

POS

QUIESCENT

(

) (

)

340

QUIESCENT

2. Calculate power dissipation from loads. For a differential

output and ground-referenced load, the output power is

symmetrical in each output phase.

(

)

RMS

OUTPUT

RMS

OUTPUT

POS

OUTPUT

−

(

) (

)

100

−

OUTPUT

There are 16 output pairs, or 32 output currents.

OUTPUT

3. Subtract the quiescent output stage current for number of

loads (32 in this example). The output stage is either

standing, or driving a load, but the current only needs to

be counted once (valid for output voltages > 0.5 V).

(

)

QUIESCENT

OUTPUT

NEG

POS

OUTPUT

−

(

)

(

−

OUTPUT

There are 16 output pairs, or 32 output currents.

OUTPUT

4. Verify that the power dissipation does not exceed the

maximum allowed value.

OUTPUT

QUIESCENT

CHIP

−

−CHIP

From Figure 70 or Equation 1, this power dissipation is below

the maximum allowed dissipation for all ambient temperatures

up to and including 85°C.

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