RT7304 datasheet(7/14 Pages) RICHTEK

7 / 14 page

RT7304

DS7304-04 February 2015

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Note 1.

Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2.

θJA is measured at TA = 25°C on a low effective thermal conductivity two-layer test board per JEDEC 51-3.

Note 3.

Devices are ESD sensitive. Handling precaution is recommended.

Note 4.

The device is not guaranteed to function outside its operating conditions.

Note 5.

Guaranteed by Design.

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Timing Control Section

Voltage Ramp Slope of the

Ramp Generator Output

Sramp

228

270

312

mV/

s

Minimum On-Time

tON(MIN)

IZCD = 150A

2.2

2.7

3.2

s

Maximum On-Time

tON(MAX)

s

Minimum Switching Period

tS(MIN)

8.5

s

Duration of Starter

tSTART

At No Valley Detected

130

300

s

Current Sense Section

Blanking Time

tLEB

LEB + Propagation Delay

(Note 5)

240

400

570

Output Diode Short-Circuit

Protection Voltage Threshold

at CS

VCS_SD

Shutdown when VCS > VCS_SD in 7

cycles.

1.5

CS Voltage Threshold for

Peak Current Limitation

VCS_CL

0.93

1.03

1.13

Propagation Delay

Compensation factor

KPC

Sourcing ICS = IZCD x KPC ,

IZCD = 150A

0.02

A/A

Gate Driver Section

GD Voltage Rising Time

CL = 1nF

GD Voltage Falling Time

CL = 1nF

GD Output Clamping Voltage VCLAMP

CL = 1nF

Internal GD Pull Low Resistor RGD



Over-Temperature Protection Section

Over-Temperature Threshold TSD

(Note 5)

150

C

Over-Temperature Threshold

Hysteresis

TSD_HYS

(Note 5)

C

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