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RT9741 Datasheet(PDF) 9 Page - Richtek Technology Corporation |
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RT9741 Datasheet(HTML) 9 Page - Richtek Technology Corporation |
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9 / 11 page ![]() RT9741 9 DS9741-01 March 2015 www.richtek.com © Copyright 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. connector pins are recommended for EMI and ESD protection. The bypass capacitor itself should have a low dissipation factor to allow decoupling at higher frequencies. Voltage Drop The USB specification states a minimum port-output voltage in two locations on the bus, 4.75V out of a Self- Powered Hub port and 4.40V out of a Bus-Powered Hub port. As with the Self-Powered Hub, all resistive voltage drops for the Bus-Powered Hub must be accounted for to guarantee voltage regulation. The following calculation determines VOUT(MIN) for multiple ports (NPORTS) ganged together through one switch (if using one switch per port, NPORTS is equal to 1) : VOUT(MIN) = 4.75V − [II x ( 4 x RCONN + 2 x RCABLE )] − (0.1A x NPORTS x RSWITCH) − VPCB Where RCONN = Resistance of connector contacts (two contacts per connector) RCABLE = Resistance of upstream cable wires (one 5V and one GND) RSWITCH = Resistance of power switch (typical 100m Ω for RT9741A and 120m Ω for RT9741C) VPCB = PCB voltage drop The USB specification defines the maximum resistance per contact (RCONN) of the USB connector to be 30m Ω and the drop across the PCB and switch to be 100mV. This basically leaves two variables in the equation: the resistance of the switch and the resistance of the cable. If the hub consumes the maximum current (II) of 500mA, the maximum resistance of the cable is 90m Ω. The resistance of the switch is defined as follows : RSWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x 90m Ω) ] − VPCB } ( 0.1A x NPORTS ) = (200mV − VPCB ) ( 0.1A x NPORTS ) If the voltage drop across the PCB is limited to 100mV, the maximum resistance for the switch is 250m Ω for four ports ganged together. The RT9741, with its maximum 120m Ω on resistance can fit the demand of this requirement. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TAis the ambient temperature, and θJAis the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125 °C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOT-23-3 package, the thermal resistance, θJA, is 243.3 °C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25 °C can be calculated by the following formula : PD(MAX) = (125 °C − 25°C) / (243.3°C/W) = 0.41W for SOT-23-3 package The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal resistance, θJA. The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Figure 2. Derating Curve of Maximum Power Dissipation 0.0 0.1 0.2 0.3 0.4 0.5 0 25 50 75 100 125 Ambient Temperature (°C) Four-Layer PCB |
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