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AD1980 Datasheet(PDF) 26 Page - Analog Devices |
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AD1980 Datasheet(HTML) 26 Page - Analog Devices |
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26 / 32 page ![]() REV. 0 –26– AD1980 Serial Configuration Register (Index 74h) Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 74h Serial SLOT16 REGM2 REGM1 REGM0 REGM3 DRF X CHEN X LBKS1 LBKS0 INTS X SPAL SPDZ SPLNK 1001h Configuration All registers not shown and bits containing an X are assumed to be reserved. Note that this register is not reset when the reset register (0x00) is written to (soft reset). SPLNK SPDIF Link. This bit enables the SPDIF to link with the front DACs for data requesting. 0 = SPDIF and DAC are not linked. 1 = SPDIF and DAC are linked and receive the same data requests (reset default). SPDZ SPDIF DACZ. 0 = Repeat last sample out of the SPDIF stream if FIFO under-runs (reset default). 1 = Forces midscale sample out the SPDIF stream if FIFO under-runs. SPAL SPDIF ADC Loop-around. 0 = SPDIF transmitter is connected to the AC-Link stream (reset default). 1= SPDIF transmitter is connected to the digital ADC stream, not the AC-Link. INTS Interrupt Mode Select. This bit selects the JS interrupt implementation path. 0 = Bit 0 SLOT 12 (modem interrupt) (reset default). 1 = Slot 6 Valid Bit (MIC ADC interrupt). LBKS[1:0] Loop-Back Selection. These bits select the internal digital loop-back path when LPBK bit is active (see Register 20h) 00 = Loop back through the front DACs (reset default). 01 = Loop back through the surround DACs. 10 = Reserved 11 = Loop-back through the center and LFE DACs (Center DAC loops back from the ADC left channel, the LFE DAC from the ADC right channel). CHEN Chain Enable. This bit enables chaining of a slave codec SDATA_IN stream into the ID0 pin (Pin 45). 0 = Disable chaining (reset default). 1 = Enable chaining into ID0 pin. DRF DAC Request Force. This allows the AD1980 to synchronize DAC requests with the AD1981A/B. 0 = Normal DAC requesting sequence (reset default). 1 = Synchronize to AD1981A/B DAC requests. REGM3 Slave 3 Codec Register Mask REGM0 Master Codec Register Mask REGM1 Slave 1 Codec Register Mask REGM2 Slave 2 Codec Register Mask SLOT16 Enable 16-Bit Slot Mode. SLOT16 makes all ac-link slots 16 bits in length, formatted into 16 slots. This is a preferred mode for DSP serial port interfacing. |
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