TMDS00510WS datasheet(31/61 Pages) TI1

31 / 61 page

CLKOUT1

SSCLK

SSCLK (1/2rate)

CLKOUT2

SDCLK

CLKOUT2

SMJ320C6701-SP

www.ti.com

SGUS030F – APRIL 2000 – REVISED SEPTEMBER 2013

Switching Characteristics for CLKOUT2

(1)

(see Figure 10)

NO.

PARAMETER

MIN

MAX

UNIT

tc(CKO2)

Cycle time, CLKOUT2

2P – 0.7(2) 2P + 0.7(2)

tw(CKO2H)

Pulse duration, CLKOUT2 high

P – 0.7(2)

P + 0.7(2)

tw(CKO2L)

Pulse duration, CLKOUT2 low

P – 0.7(2)

P + 0.7(2)

tt(CKO2)

Transition time, CLKOUT2

0.6(2)

(1)

P = 1/CPU clock frequency in ns.

(2)

This parameter is not tested.

Figure 10. CLKOUT2 Timing

SDCLK, SSCLK Timing Parameter

SDCLK timing parameters are the same as CLKOUT2 parameters.

SSCLK timing parameters are the same as CLKOUT1 or CLKOUT2 parameters, depending on SSCLK

configuration.

Switching Characteristics for the Relation of SSCLK, SDCLK, and CLKOUT2 to CLKOUT1

(see Figure 11)

NO.

PARAMETER

MIN

MAX

UNIT

td(CKO1–SSCLK)

Delay time, CLKOUT1 edge to SSCLK edge

–0.8

3.4

td(CKO1–SSCLK1/2)

Delay time, CLKOUT1 edge to SSCLK edge (1/2 clock rate)

–1

td(CKO1–CKO2)

Delay time, CLKOUT1 edge to CLKOUT2 edge

–1.5

2.5

td(CKO1–SDCLK)

Delay time, CLKOUT1 edge to SDCLK edge

–1.5

1.9

Figure 11. Relation of CLKOUT2, SDCLK, and SSCLK to CLKOUT1

Submit Documentation Feedback

Product Folder Links: SMJ320C6701-SP

TMDS00510WS Datasheet(PDF) 31 Page - Texas Instruments

TMDS00510WS Datasheet(HTML) 31 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

Datasheet Download

Link URL