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WM8962B Datasheet(PDF) 174 Page - Wolfson Microelectronics plc

Part # WM8962B
Description  Ultra-Low Power Stereo CODEC with Audio Enhancement DSP, 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers
PDF  295 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8962B Datasheet(HTML) 174 Page - Wolfson Microelectronics plc

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WM8962
174
Rev 4.3
EXAMPLE PLL CALCULATION
A typical application may require a 12MHz clock output and a 24.576MHz clock output from the
WM8962.
In this case, it is recommended that PLL2 should be configured for 24MHz output. Under default
conditions, the CLKOUT2_DIV function will apply further division, enabling 12MHz output on the
CLKOUT2 pin.
The CLKOUT3 pin is suitable for 24.576MHz output, using the default values of the CLKOUT3_DIV
and PLL3_OUTDIV registers.
The following example illustrates how to derive the PLL registers to generate 24.000MHz output (FOUT)
from a 24.000 MHz reference clock (FREF).
Set PLLn_OUTDIV to ensure FVCO is in the range 90MHz to 100MHz.
FOUT = 24.000MHz, therefore PLLn_OUTDIV = 1 (divide by 4)
Calculate FVCO as given by FVCO = FOUT x PLLn_OUTDIV:-
FVCO = 24.000 x 4 = 96.000MHz
Calculate N.K as given by N.K = (FVCO x 2) / FREF:
N.K = (96.000 x 2) / 24 = 8.0
Determine PLLn_N and PLLn_K from the integer and fractional portions of N.K:-
PLLn_N = 8. PLLn_K = 0.0
N.K is an integer; set PLLn_FRAC = 0.
The following example illustrates how to derive the PLL registers to generate 24.576MHz output (FOUT)
from a 24.000 MHz reference clock (FREF).
Set PLLn_OUTDIV to ensure FVCO is in the range 90MHz to 100MHz.
FOUT = 24.576MHz, therefore PLLn_OUTDIV = 1 (divide by 4)
Calculate FVCO as given by FVCO = FOUT x PLLn_OUTDIV:-
FVCO = 24.576 x 4 = 98.304MHz
Calculate N.K as given by N.K = (FVCO x 2) / FREF:
N.K = (98.304 x 2) / 24 = 8.192
Determine PLLn_N and PLLn_K from the integer and fractional portions of N.K:-
PLLn_N = 8. PLLn_K = 0.192
Confirm that N.K is a fractional quantity and set PLLn_FRAC:
N.K is fractional. Set PLLn_FRAC = 1.
Convert PLL_K into integer format:
0.192 x 16777216 = 3221225.472 (decimal).
Round off to 3221225 (decimal) = 3126E9h
PLLn_K [23:16] = 31h
PLLn_K [15:8] = 26h
PLLn_K [7:0] = E9h



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