DP8420V datasheet(27/60 Pages) NSC

27 / 60 page

50 Refresh Options (Continued)

53 EXTENDING REFRESH

The programmed number of periods of CLK that refresh

RASs are asserted can be extended by one or multiple peri-

ods of CLK Only the all RAS (with or without error scrub-

bing) type of refresh can be extended To extend a refresh

cycle the input extend refresh EXTNDRF must be assert-

ed before the positive edge of CLK that would have negated

all the RAS outputs during the refresh cycle and after the

positive edge of CLK which starts all RAS outputs during the

refresh as shown in

Figure 19 This will extend the refresh to

the next positive edge of CLK and EXTNDRF will be sam-

pled again The refresh cycle will continue until EXTNDRF is

sampled low on a positive edge of CLK

54 CLEARING THE REFRESH ADDRESS COUNTER

The refresh address counter can be cleared by asserting

RFSH while DISRFSH is negated as shown in

Figure 20a

This can be used prior to a burst refresh of the entire memo-

ry array By asserting RFSH one period of CLK before

DISRFSH is asserted and then keeping both inputs assert-

ed the DP8420V21V22V DP84T22 will clear the refresh

address counter and then perform refresh cycles separated

by the programmed value of precharge as shown in

Figure

20b An end-of-count signal can be generated from the Q

DRAM

address

outputs

the

DP8420V21V22V

DP84T22 and used to negate RFSH

TLF11109 – 31

FIGURE 19 Extending Refresh with the Extend Refresh (EXTNDRF) Input

TLF11109 – 32

FIGURE 20a Clearing the Refresh Address Counter

TLF11109 – 33

FIGURE 20b Clearing the Refresh Counter during Burst

DP8420V Datasheet(PDF) 27 Page - National Semiconductor (TI)