ISP1301 datasheet(13/46 Pages) PHILIPS

13 / 46 page

Philips Semiconductors

ISP1301

USB OTG transceiver

Product data

Rev. 01 — 14 April 2004

13 of 46

9397 750 11355

Table 6 speciﬁes the functionality of the device during the four USB modes.

The ISP1301 is in the USB mode when both the TRANSP_EN and UART_EN bits

are cleared.

9.4 Transparent modes

9.4.1

Transparent general-purpose buffer mode

In the transparent general-purpose buffer mode, the DAT/VP and SE0/VM pins are

connected to the DP and DM pins, respectively. Using bits TRANSP_BDIR1 and

TRANSP_BDIR0 of the Mode Control 2 register as speciﬁed in Table 8, you can

control the direction of data transfer. The ISP1301 is in the transparent

general-purpose buffer mode if bit TRANSP_EN = 1 and bit DAT_SE0 = 1.

9.4.2

Transparent UART mode

When in the transparent UART mode, the ATX behaves as two logic level translator

between the following pins:

• For TxD signal: from SE0/VM (VDD_LGC level) to DM (+3.3 V level)

• For RxD signal: from DP (+3.3 V level) to DAT/VP (VDD_LGC level).

In the UART mode, the OTG controller is allowed to connect a UART to the DAT/VP

and SE0/VM pins of the ISP1301.

The UART mode is entered by setting the UART_EN bit in the Mode Control 1

buffer mode (bit TRANSP_BDIR1 = 1, bit TRANSP_BDIR0 = 0).

9.4.3

Summary tables

[1]

Conditions:

a) bit SPD_SUSP_CTRL

= 0 and pin SUSPEND = HIGH, or

b) bit SPD_SUSP_CTRL

= 1 and bit SUSPEND_REG = 0.

Table 4:

Device operating modes

Mode

USB

suspend

condition[1]

Bit

DAT

_SE0

OE_N/

INT_N

Bit

TRANSP

_EN

Bit

UART

_ EN

Description

Direct I2C-bus mode

HIGH

USB modes

USB suspend mode

see Table 5 and Table 7

USB functional mode

ATX is fully functional; see Table 6

Transparent modes

Transparent general-purpose

buffer mode

ATX is not functional; see Table 8

Transparent UART mode

DAT/VP <= DP (RxD signal of UART)

SE0/VM => DM (TxD signal of UART);

ATX is not functional

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