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ISP1301 Datasheet(PDF) 26 Page - NXP Semiconductors |
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ISP1301 Datasheet(HTML) 26 Page - NXP Semiconductors |
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26 / 46 page ![]() Philips Semiconductors ISP1301 USB OTG transceiver Product data Rev. 01 — 14 April 2004 26 of 46 9397 750 11355 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 13. I2C-bus protocol For detailed information, refer to The I2C-bus specification; version 2.1. 13.1 I2C-bus byte transfer format [1] S = Start; A = Acknowledge; P = Stop. 13.2 I2C-bus device address 13.3 Write format A write operation can be performed as: • One-byte write to the specified register address • Multi-byte write to N consecutive registers, starting from the specified start address. N defines the number of registers to write. If N = 1, only the start register is written. 13.3.1 One-byte write Figure 12 illustrates the byte sequence. Table 33: I2C-bus byte transfer format[1] S Byte 1 A Byte 2 A Byte 3 A … A P 8 bits 8 bits 8 bits … Table 34: Device address byte 1 Bit 7 6 5 4 3 2 1 0 device address - Name A6 A5 A4 A3 A2 A1 A0 R/W Value 0 1 0 1 1 0 X X Table 35: Bit description Bit Symbol Description 7 to 1 A[6:0] Device address: The device address of the ISP1301 is: 0101 10 (A0). The value of A0 (LSB) is loaded from pin ADR/PSW during reset (including power-on reset). If pin ADR/PSW = HIGH, bit A0 = 1; otherwise bit A0 = 0. 0 R/W Read/write command. 0 — write 1 — read. Table 36: Transfer format description for one-byte write Byte Description S master starts with a START condition Device select master transmits device address and write command bit R/W = 0 ACK slave generates an acknowledgment Register address K master transmits address of register K |
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