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ISP1301 Datasheet(PDF) 18 Page - NXP Semiconductors |
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ISP1301 Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 46 page ![]() Philips Semiconductors ISP1301 USB OTG transceiver Product data Rev. 01 — 14 April 2004 18 of 46 9397 750 11355 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Version ID register (Read: 14H–15H): Table 16 shows the bit allocation of this register. 11.1.2 Mode control registers Mode Control 1 register (Set/Clear: 04H/05H): The bit allocation of the Mode Control 1 register is given in Table 17. Mode Control 2 register (Set/Clear: 12H/13H): For the bit allocation of this register, see Table 19. Table 16: Version ID register: bit description Bit Symbol Access Value Description 15 to 0 VERSIONID [15:0] R 0210H Version number of the ISP1301 Table 17: Mode Control 1 register: bit allocation Bit 7 6 5 4 3 2 1 0 Symbol - UART_EN OE_INT_ EN BDIS_ ACON_EN TRANSP_ EN DAT_SE0 SUSPEND _REG SPEED_ REG Reset - 0000000 Access R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Table 18: Mode Control 1 register: bit description Bit Symbol Description 7 - reserved 6 UART_EN When set, the ATX is in the transparent UART mode. 5 OE_INT_EN When set and when in the suspend mode, pin OE_N/INT_N becomes an output and is asserted when an interrupt occurs. 4 BDIS_ACON_EN Enables the A-device to connect if the B-device disconnect is detected; see Section 11.3 3 TRANSP_EN When set, the ATX is in the transparent mode. 2 DAT_SE0 0 — VP_VM mode 1 — DAT_SE0 mode; see Table 6 and Table 7 1 SUSPEND_REG Sets the ISP1301 in the suspend mode, if bit SPD_SUSP_CTRL = 1. 0 — active-power mode 1 — USB suspend mode 0 SPEED_REG Sets the rise time and the fall time of the transmit driver in USB modes, if bit SPD_SUSP_CTRL = 1. 0 — USB low-speed mode 1 — USB full-speed mode |
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