THS3095DR datasheet(24/31 Pages) TI

24 / 31 page

www.ti.com

PowerPAD™ LAYOUT CONSIDERATIONS

POWER DISSIPATION AND THERMAL

Dmax

Tmax * TA

where:

PDmax is the maximum power dissipation in the amplifier (W).

Tmax is the absolute maximum junction temperature (°C).

TA is the ambient temperature (°C).

θJA = θJC + θCA

θJC is the thermal coefficient from the silicon junctions to the

case (

°C/W).

θCA is the thermal coefficient from the case to ambient air

(

°C/W).

THS3091

THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

CONSIDERATIONS

1. PCB with a top-side etch pattern is shown in

Figure 72. There should be etch for the leads as

The

THS3091/5

incorporates

automatic

thermal

well as etch for the thermal pad.

shutoff protection. This protection circuitry shuts down

the amplifier if the junction temperature exceeds

2. Place 13 holes in the area of the thermal pad.

approximately 160

°C. When the junction temperature

These holes should be 10 mils in diameter. Keep

reduces to approximately 140

°C, the amplifier turns

them small so that solder wicking through the

again.

But,

for

maximum

performance

and

holes is not a problem during reflow.

reliability, the designer must ensure that the design

3. Additional vias may be placed anywhere along

does not exeed a junction temperature of 125

°C.

the thermal plane outside of the thermal pad

Between 125

°C and 150°C, damage does not occur,

area. This helps dissipate the heat generated by

but the performance of the amplifier begins to de-

the THS3091/5 IC. These additional vias may be

grade and long-term reliability suffers. The thermal

larger than the 10-mil diameter vias directly under

characteristics of the device are dictated by the

the thermal pad. They can be larger because

package and the PC board. Maximum power dissi-

they are not in the thermal pad area to be

pation for a given package can be calculated using

soldered so that wicking is not a problem.

the following formula.

4. Connect all holes to the internal ground plane.

Note that the PowerPAD is electrically isolated

from the silicon and all leads. Connecting the

PowerPAD to any potential voltage such as VS- is

acceptable as there is no electrical connection to

the silicon.

5. When connecting these holes to the ground

plane, do not use the typical web or spoke via

connection methodology. Web connections have

a high thermal resistance connection that is

useful for slowing the heat transfer during

soldering operations. This makes the soldering of

vias that have plane connections easier. In this

application, however, low thermal resistance is

desired for the most efficient heat transfer. There-

For systems where heat dissipation is more critical,

fore, the holes under the THS3091/5 PowerPAD

the THS3091 and THS3095 are offered in an 8-pin

package should make their connection to the

SOIC (DDA) with PowerPAD package. The thermal

internal ground plane with a complete connection

coefficient for the PowerPAD packages are substan-

around

the

entire

circumference

the

tially improved over the traditional SOIC. Maximum

plated-through hole.

power dissipation levels are depicted in the graph for

6. The top-side solder mask should leave the ter-

the available packages. The data for the PowerPAD

minals of the package and the thermal pad area

packages assume a board layout that follows the

with its 13 holes exposed. The bottom-side solder

PowerPAD layout guidelines referenced above and

mask should cover the 13 holes of the thermal

detailed in the PowerPAD application note (literature

pad area. This prevents solder from being pulled

number SLMA002). The following graph also illus-

away from the thermal pad area during the reflow

trates the effect of not soldering the PowerPAD to a

process.

PCB. The thermal impedance increases substantially

7. Apply solder paste to the exposed thermal pad

which may cause serious heat and performance

area and all of the IC terminals.

issues. Be sure to always solder the PowerPAD to

the PCB for optimum performance.

8. With these preparatory steps in place, the IC is

simply placed in position and run through the

solder

reflow

operation

any

standard

surface-mount component. This results in a part

that is properly installed.

THS3095DR Datasheet(PDF) 24 Page - Texas Instruments

THS3095DR Datasheet(HTML) 24 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Datasheet Download

Link URL