GS2972 datasheet(7/125 Pages) SEMTECH

7 / 125 page

GS2972 3G/HD/SD-SDI Serializer with Complete

SMPTE Audio & Video Support

Final Data Sheet

Rev. 9

GENDOC-047479

September 2013

7 of 125

www.semtech.com

5. Application Reference Design .............................................................................................................120

5.1 Typical Application Circuit ......................................................................................................120

6. References & Relevant Standards .......................................................................................................121

7. Package & Ordering Information ........................................................................................................122

7.1 Package Dimensions ...................................................................................................................122

7.2 Packaging Data .............................................................................................................................123

7.3 Marking Diagram .........................................................................................................................123

7.4 Solder Reflow Profiles ................................................................................................................124

7.5 Ordering Information .................................................................................................................124

List of Figures

Figure 1-1: Pin Assignment ......................................................................................................................... 10

Figure 3-1: Differential Output Stage (SDO/SDO) .............................................................................. 26

Figure 3-2: Digital Input Pin ........................................................................................................................ 26

Figure 3-3: Digital Input Pin with Schmitt Trigger (RESET) .............................................................. 26

Figure 3-4: Digital Input Pin with weak pull-down - maximum pull-down current ............... 27

Figure 3-5: Digital Input Pin with weak pull-up - maximum pull-up current ........................... 27

Figure 3-6: Bidirectional Digital Input/Output Pin with programmable drive strength......... 27

Figure 3-7: Bidirectional Digital Input/Output Pin with programmable drive strength......... 28

Figure 3-8: VBG .............................................................................................................................................. 28

Figure 3-9: Loop Filter .................................................................................................................................. 29

Figure 4-1: GS2972 Video Host Interface Timing Diagrams ............................................................ 31

Figure 4-2: H:V:F Output Timing - 3G Level A and HDTV 20-bit Mode ...................................... 36

Figure 4-3: H:V:F Output Timing - 3G Level A and HDTV 10-bit Mode

3G Level B 20-bit Mode, each 10-bit stream ......................................................................................... 36

Figure 4-4: H:V:F Output Timing - 3G Level B 10-bit Mode ............................................................. 36

Figure 4-5: H:V:F Input Timing - HD 20-bit Input Mode ................................................................... 36

Figure 4-6: H:V:F Input Timing - HD 10-bit Input Mode ................................................................... 37

Figure 4-7: H:V:F Input Timing - SD 20-bit Mode ............................................................................... 37

Figure 4-8: H:V:F Input Timing - SD 10-bit Mode ............................................................................... 37

Figure 4-9: H:V:DE Input Timing 1280 x 720p @ 59.94/60 (Format 4) ........................................ 39

Figure 4-10: H:V:DE Input Timing 1920 x 1080i @ 59.94/60 (Format 5) ..................................... 39

Figure 4-11: H:V:DE Input Timing 720 (1440) x 480i @ 59.94/60 (Format 6&7) ....................... 40

Figure 4-12: H:V:DE Input Timing 1280 x 720p @ 50 (Format 19) ................................................ 40

Figure 4-13: H:V:DE Input Timing 1920 x 1080i @ 50 (Format 20) ............................................... 41

Figure 4-14: H:V:DE Input Timing 720 (1440) x 576 @ 50 (Format 21&22) ................................ 41

Figure 4-15: H:V:DE Input Timing 1920 x 1080p @ 59.94/60 (Format 16) ................................. 42

Figure 4-16: H:V:DE Input Timing 1920 x 1080p @ 50 (Format 31) .............................................. 42

Figure 4-17: H:V:DE Input Timing 1920 x 1080p @ 23.94/24 (Format 32) ................................. 42

Figure 4-18: H:V:DE Input Timing 1920 x 1080p @ 25 (Format 33) .............................................. 43

Figure 4-19: H:V:DE Input Timing 1920 x 1080p @ 29.97/30 (Format 34) ................................. 43

Figure 4-20: ACLK to Data and Control Signal Input Timing .......................................................... 46

Figure 4-21: I2S Audio Input Format ....................................................................................................... 47

Figure 4-22: AES/EBU Audio Input Format .......................................................................................... 48

Figure 4-23: Serial Audio, Left Justified, MSB First ............................................................................. 48

Figure 4-24: Serial Audio, Left Justified, LSB First .............................................................................. 48

Figure 4-25: Serial Audio, Right Justified, MSB First ..........................................................................48

Figure 4-26: Serial Audio, Right Justified, LSB First ........................................................................... 48

Figure 4-27: Ancillary Data Packet Placement Example for SD Mode ........................................ 52

Figure 4-28: ORL Matching Network, BNC and Coaxial Cable Connection ............................... 84

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