PCM1730

SLES021 – NOVEMBER 2001

14

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op amp for I/V converter circuit

OPA627BP/BM or NE5534 type op amp is recommended for I/V conversion circuit to obtain specified audio

performance. Dynamic performance such as gain bandwidth, settling time and slew rate of op amp gives audio

dynamic performance at I/V section. Input noise specification of op amp should be considered to obtain 120 dB

S/N ratio.

analog gain by balanced amp

The I/V converters are followed by balanced amplifier stages, which sum the differential signals for each

channel, creating a single-ended voltage output. In addition, the balanced amplifiers provide a second-order

low pass filter function, which band limits the audio output signal. The cutoff frequency and gain are given by

the external R and C component values. In this case, the cutoff frequency is 45 kHz with a gain of 1. The output

voltage for each channel is 6.2 Vp-p, or 2.2 Vrms.

reference current resistor

be 16 k

Ω ±1% in order to match the specified gain error shown in the specifications table.

theory of operation

Analog Output

Digital Input

24 Bit

8 fS

MSB

and

Lower 18 Bit

Upper

6 Bit

ICOB

Decoder

3rd-Order

5-Level

Sigma-Delta

Advanced

DWA

Current

Segment

DAC

0–4

Level

0–62

Level

0–66

Figure 8. Advanced Segments DAC

The PCM1730 utilizes Texas Instruments’ newly developed advanced segment DAC architecture to achieve

excellent dynamic performance and improved tolerance to clock jitter. The PCM1730 provides balanced current

outputs, allowing the user to optimize analog performance externally.

Digital input data via digital filter separates into the upper 6 bits and lower the 18 bits. The upper 6 bits are

converted to ICOB (inverted complementary offset binary) code. The lower 18 bits associated with the MSB are

equivalent to the 1 LSB of the above code converter. The data groups processed in the ICOB converter and

third order delta-sigma modulator are summed together to be created over the 64 level digital code, and then

processed in DWA (data weighted averaging) to reduce noise produced by element mismatch. The data of over

64 level via DWA is converted to analog output in the differential current segment portion.

This architecture has overcome the various drawbacks of conventional multi-bit and also achieves excellent

dynamic performance.

considerations for application circuit

PCB layout guidelines

A typical PCB floor plan for the PCM1730 is shown in Figure 9. A ground plane is recommended, with the analog

and digital sections being isolated from one another using a split or cut in the circuit board. The PCM1730 should

be oriented with the digital I/O pins facing the ground plane split/cut to allow for short, direct connections to the

digital audio interface and control signals originating from the digital section of the board.