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GXM Datasheet(PDF) 149 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 149 Page - National Semiconductor (TI) |
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149 / 244 page ![]() Revision 3.1 149 www.national.com Integrated Functions (Continued) 4.5.12 Cursor Position Registers The Cursor Position Registers contain pixel coordinate information for the cursor. These values are not latched by the timing generator until the start of the frame to avoid tearing artifacts when moving the cursor. The Cursor Position group consists of four 32-bit registers located at GX_BASE+8350h-835Ch. These registers are described below and Table 4-33 gives their bit formats. • Display Controller Cursor X Position (DC_CURSOR_X) - Contains the X position information of the hardware cursor. • Display Controller Vertical Line Count (DC_V_LINE_CNT) - This register is read only. It provides the current scanline for the display. It is used by software to time update of the frame buffer to avoid tearing artifacts. • Display Controller Cursor Y Position (DC_CURSOR_Y) - Contains the Y position information of the hardware cursor. • Display Controller Split-Screen Line Compare (DC_SS_LINE_CMP) - Contains the line count at which the lower screen begins in a VGA split-screen mode. Table 4-33. Display Controller Cursor Position Registers Bit Name Description GX_BASE+8350h-8353h DC_CURSOR_X Register (R/W) Default Value = xxxxxxxxh 31:16 RSVD Reserved: Set to 0. 15:11 X_OFFSET X Offset: This field represents the X pixel offset within the 32x32 cursor pattern at which the displayed portion of the cursor is to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors for which the "hot spot" is not at the left edge of the pattern, it may be necessary to display the rightmost pixels of the cursor only as the cursor moves close to the left edge of the display. 10:0 CURSOR_X Cursor X: This field represents the X coordinate of the pixel at which the upper left corner of the cursor is to be displayed. This value is referenced to the screen origin (0,0) which is the pixel in the upper left corner of the screen. GX_BASE+8354h-8357h DC_V_LINE_CNT Register (RO) Default Value = xxxxxxxxh 31:11 RSVD Reserved (Read Only) 10:0 V_LINE_CNT (RO) Vertical Line Count (Read Only): This value is the current scanline of the display. Note: The value in this register is driven directly off of the DOTCLK, and consequently it is not synchronized with the CPU clock. Soft- ware should read this register twice and compare the result to ensure that the value is not transitioning. GX_BASE+8358h-835Bh DC_CURSOR_Y Register (R/W) Default Value = xxxxxxxxh 31:16 RSVD Reserved: Set to 0. 15:11 Y_OFFSET Y Offset: This field represents the Y line offset within the 32x32 cursor pattern at which the displayed portion of the cursor is to begin. Normally, this value is set to zero to display the entire cursor pattern, but for cursors for which the "hot spot" is not at the top edge of the pattern, it may be necessary to display the bottommost lines of the cursor only as the cursor moves close to the top edge of the display. Note that if this value is nonzero, the CUR_START_OFFSET must be set to point to the first cursor line to be displayed. 10 RSVD Reserved: Set to 0. 9:0 CURSOR_Y Cursor Y: This field represents the Y coordinate of the line at which the upper left corner of the cursor is to be displayed. This value is referenced to the screen origin (0,0) which is the pixel in the upper left cor- ner of the screen. This field is alternately used as the line-compare value for a newly-programmed frame buffer start offset. This is necessary for VGA programs that change the start offset in the middle of a frame. In order to use this function, the hardware cursor function should be disabled. GX_BASE+835Ch-835Fh DC_SS_LINE_CMP Register (R/W) Default Value = xxxxxxxxh 31:11 RSVD Reserved: Set to 0. 10:0 SS_LINE_CM P Split-Screen Line Compare: This is the line count at which the lower screen begins in a VGA split- screen mode. Note: When the internal line counter hits this value, the frame buffer address is reset to 0. This function is enabled with the SSLC bit in the DC_GENERAL_CFG register. |
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