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GXM Datasheet(PDF) 145 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 145 Page - National Semiconductor (TI) |
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145 / 244 page ![]() Revision 3.1 145 www.national.com Integrated Functions (Continued) GX_BASE+8318h-831Bh DC_CUR_ST_OFFSET Register (R/W) Default Value = xxxxxxxxh 31:22 RSVD Reserved: Set to 0. 21:0 CUR_START _OFFSET Cursor Start Offset: This value represents the byte offset of the starting location of the cursor display pattern. Bits [1:0] should always be programmed to zero so that the start offset is DWORD aligned. The cursor data will be stored as a linear block of data. The active cursor will always be 32x32x2 bits in size. Multiple cursor patterns may be loaded into off-screen memory. The start offset is loaded at the start of a frame. Each cursor pattern will be exactly 256 bytes in size. Note that if there is a Y offset for the cursor pattern, the cursor start offset should be set to point to the first displayed line of the cursor pattern. The cursor code for a given pixel is determined by an AND mask and an XOR mask. Each line of a cursor will be stored as two DWORDs, with each DWORD containing the AND masks for 16 pixels in the upper word and the XOR masks for 16 pixels in the lower word. DWORDs will be arranged with the leftmost block of 16 pixels being least significant and the rightmost block being most significant. Pixels within words will be arranged with the leftmost pixels being most significant and the rightmost pixels being least significant. The 2-bit cursor codes are as follows. AND XOR Displayed 0 0 Cursor Color 0 0 1 Cursor Color 1 1 0 Transparent − Background Pixel 11Inverted − Bit-wise Inversion of Background Pixel GX_BASE+831Ch-831Fh Reserved Default Value = 00000000h GX_BASE+8320h-8323h DC_VID_ST_OFFSET Register (R/W) Default Value = xxxxxxxxh 31:21 RSVD Reserved: Set to 0. 20:0 VID_START _OFFSET Video Buffer Start Offset Value: This is the value for the Video Buffer Start Offset. It represents the starting location for Video Buffer. Bits [3:0] should always be programmed as zero so that the start offset is aligned to a 16 byte boundary. GX_BASE+8324h-8327h DC_LINE_DELTA Register (R/W) Default Value = xxxxxxxxh 31:22 RSVD Reserved: Set to 0. 21:12 CB_LINE_ DELTA Compressed Display Buffer Line Delta: This value represents number of DWORDs that, when added to the starting offset of the previous line, will point to the start of the next compressed line in memory. It is used to always maintain a pointer to the starting offset for the compressed display buffer line being loaded into the display FIFO. 11:10 RSVD Reserved: Set to 0. 9:0 FB_LINE_ DELTA Frame Buffer Line Delta: This value represents number of DWORDs that, when added to the starting offset of the previous line, will point to the start of the next frame buffer line in memory. It is used to always maintain a pointer to the starting offset for the frame buffer line being loaded into the display FIFO. GX_BASE+8328h-832Bh DC_BUF_SIZE Register (R/W) Default Value = xxxxxxxxh 31:30 RSVD Reserved: Set to 0. 29:16 VID_BUF_ SIZE Video Buffer Size: These bits set the video buffer size, in 64-byte segments. The maximum size is 1 MB. 15:9 CB_LINE_ SIZE Compressed Display Buffer Line Size: This value represents the number of DWORDs for a valid com- pressed line plus 1. It is used to detect an overflow of the compressed data FIFO. It should never be larger than 41h or 65Dh since the maximum size of the compressed data FIFO is 64 DWORDs. 8:0 FB_LINE_ SIZE FrameBufferLineSize: This value specifies the number of QWORDS (8-byte segments) to transfer for each display line from the frame buffer. If panning is enabled, this value can generally be programmed to the displayed number of QWORDS + 2 so that enough data is transferred to handle any possible alignment. Extra pixel data in the FIFO at the end of a line will automatically be discarded. GX_BASE+832Ch-832Fh Reserved Default Value = 00000000h Table 4-31. Display Controller Memory Organization Registers (Continued) Bit Name Description |
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