DS1680

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RESISTIVE TOUCH SCREEN (4-WIRE)

Resistive touch screens consist of two resistive plates that are separated by a small gap. Each plate has an

electrode at each end; when the screen is touched the pressure forces the two plates to come in contact at

the exact position of the touch. To get the x-coordinate position, the DS1680 will drive the X-plane

resistive film (via X+ and X-) and sense the voltage picked up by the Y-plane resistive film (via Y+ and

Y-). Next, to get the y-coordinate position, the DS1680 will drive the Y- plane resistive film and sense the

voltage picked up by the X-plane resistive film.

ANALOG-TO-DIGITAL CONVERTER (ADC)

The DS1680 provides a 10-bit ADC. Two multiplexed analog inputs are provided through the AIN0 and

AIN1 pins along with two other inputs on the X- and Y- pins. The ADC is monotonic (no missing codes)

and uses a successive approximation technique to convert the analog signal into a digital code.

An analog-to-digital conversion is the process of assigning a digital code to an analog input voltage. This

code represents the input value as a fraction of the full-scale voltage (FSV) range. The FSV range is then

divided by the ADC into 1024 codes (10 bits), and is bound by an upper limit equal to the reference

voltage and the lower limit, which is ground.

On-chip circuitry detects if the pen is in contact with the digitizer tablet. The pen-detection status is

indicated on pin (PEN_OFF) and can be used by the system for signaling end-of-stroke for handwriting

recognition software purposes. If no pen is detected, PEN_OFF will be pulled to logic 1 and no

coordinate data will be made available. PEN_OFF at logic 0 indicates that a pen is detected on the

digitizer tablet and its coordinate position will be made available on D0–D7. The NEW_DATA pin

pulses low to indicate when a new coordinate data pair is available.

When the AVG pin is set to logic 0, the data at pins D0–D7 will indicate the most recent sample of the

ADC. Setting the AVG pin to logic 1 invokes the data averaging mode. In this mode, the data output on

D0–D7 will indicate the rolling average of the four most recent samples of the ADC.

The DS1680 continuously monitors the CONVERT and ANSELIN signals; on the internal clock’s rising

edge (state cycle), the corresponding AIN0 or AIN1 conversion is requested. The conversion request

the present conversion cycle; otherwise AIN0 and/or AIN1 will be sampled and converted in the next

conversion cycle. The logic level of the ANSELIN input will determine whether a sample is taken from

the AIN0 or AIN1 input. Table 3 lists the specific analog input that is selected by this signal. Figure 8

shows the required timing associated with CONVERT and ANSELIN. If the state of ANSELIN changes

while CONVERT is at logic 1 and you meet the timing requirements of figure 8, both AIN0 and AIN1

conversions are requested. If the ANSELIN does not change states while CONVERT is at

logic 1, only AIN0 or AIN1 conversion is requested. If a pen is detected during a conversion request, then

X and Y will be sampled and converted prior to the AIN0 and/or AIN1 conversion. The AIN0 and AIN1

conversion result is output on the D0–D7 as defined in the Parallel Interface section.

ANALOG INPUT SELECTION Table 3

ANSELIN

ANALOG INPUT

0

AINO

1

AIN1