| Electronic Components Datasheet Search |
|
DS1680 Datasheet(PDF) 12 Page - Dallas Semiconductor |
|
|
|||||||||||||||||||||||||||||
DS1680 Datasheet(HTML) 12 Page - Dallas Semiconductor |
|
12 / 23 page ![]() DS1680 12 of 23 PROGRAMMABLE DUTY CYCLE The current required to take an X or Y measurement is VAVD / RD. In the case of RD = 250O and VAVD = 5V, the current required is 20mA. The average current is the current during the measurement, multiplied by the ratio of the time the drivers are on, to the power of total sample time. In order to minimize the average current, the on-time should be limited to the minimum time required for the tablet RC delay. Experimental data suggests that a typical RC time constant is between 4µs and 5 µs for a resistive touch screen. In order to achieve 10-bit resolution, the settling time must be eight time constants. This creates a requirement of a minimum of 80 µs on-time total, 40µs for each X and Y measurement. To provide both low power and high sample rate, the on-time for the X- and Y- measurement duty cycle is programmable. Bits 4 and 5 (SP0 and SP1) of the control register (0Bh) select the on-time of four different frequency ranges. The frequencies given are the maximum frequency for that timing range, which will not violate the 40 µs-per-measurement requirement. SP1 SP0 FREQUENCY RANGE (MHz) AVERAGE CURRENT (A) SAMPLES/SEC NO. OF CYCLES 0* 0* 2.0 870µ 543 5 0 1 2.8 1.217m 760 7 1 0 4.0 1.739m 1086 10 1 1 5.0 2.261m 1359 13 *This is the default setting Average current is the current required for the measurement, averaged out over the entire sample. This average current is only related to the measurement phase when the drivers are on. The average current will be drawn from the VCC supply. There is also current associated with the pen-detection phase, the ADC, and the control logic. The number of cycles indicated is the number of on-time state cycles. One state cycle is 16 main clock cycles. If the frequency range is 2.0MHz, the state frequency is 2MHz/16 = 125kHz. There are 230 state cycles in one complete sample. The number of cycles can be used to calculate the settling time and the sample rate. Example 1: Frequency Range : 2.0MHz Input Clock Frequency : 1.8432MHz tsettle = (1 / 1.8432e6) x 16 x 5 = 43.4 µs Iavg = (10 / 230) x 20mA = 870 µA Sample Rate = 1.8432e6 / (16 x 230) = 501 samples/sec Example 2: Frequency Range : 2.8MHz Input Clock Frequency : 1.8432MHz tsettle = (1 / 1.8432e6) x 16 x 7 = 60.8 µs Iavg = (14 / 230) / x 20mA = 1.217mA Sample Rate = 1.8432e6 / (16 x 230) = 501 samples/sec |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |