DP7132

9

Doc No. MD-2124, Rev. E

© NIDEC COPAL ELECTRONICS CORP.

Characteristics subject to change without notice

Wiper Control Register (WCR) Description

The DP7132 contains a 7-bit Wiper Control Register

which is decoded to select one of the 128 switches along

its resistor array. The WCR is a volatile register and is

written with the contents of the nonvolatile Data Register

(DR) on power-up. The Wiper Control Register loses its

contents when the DP7132 is powered-down. The

contents of the WCR may be read or changed directly by

the host using a READ/WRITE command after addressing

the WCR (see Table 1 to access WCR). Since the

DP7132 will only make use of the 7 LSB bits (The first

data bit, or MSB, is ignored) on write instructions and will

always come back as a “0” on read commands.

XXXXXXX

AX

Ah

2

0

-

s

s

e

r

d

d

a

R

T

S

0

1

0

1

0

0

0

0

A

0

0

0

0

00

1

0

A

1

0

0

00

0

0

0

A

P

S

e

t

y

b

d

r

3

e

t

y

b

d

n

2

e

t

y

b

t

s

1

WCR(80h) selection

T

P

A

0

0

0

0

0

0

0

0

A

0

0

0

0

1

0

1

0

S

S

e

t

y

b

a

t

a

d

h

0

0

-

s

s

e

r

d

d

a

R

C

W

e

t

y

b

s

s

e

r

d

d

a

e

v

a

l

s

111

A1

Ah

2

0

-

s

s

e

r

d

d

a

R

T

S

0

1

0

1

0

00

0

A

00

0

0

0

0

1

0

A

1

0

0

0

0

0

0

0

e

t

y

b

d

r

3

e

t

y

b

d

n

2

e

t

y

b

t

s

1

ASP

WCR(80h) selection

T

P

S

0

0

0

0

0

0

0

0

A

0

0

0

1

1

0

1

0

S

s

t

i

b

)

0

(

t

n

e

m

e

r

c

e

d

/

)

1

(

t

n

e

m

e

r

c

n

i

h

0

0

-

s

s

e

r

d

d

a

R

C

W

e

t

y

b

s

s

e

r

d

d

a

e

v

a

l

s

00

0

0

Ah

2

0

-

s

s

e

r

d

d

a

R

T

S

0

1

0

1

0

00

0

A

00

0

0

0

0

1

0

A

1

0

0

0

0

0

0

0

WCR(80h) selection

T

S

0

1

0

1

0

00

0

A

00

0

0

0

0

0

0

h

0

0

-

s

s

e

r

d

d

a

R

C

W

e

t

y

b

s

s

e

r

d

d

a

e

v

a

l

s

T

S

0

1

0

1

0

00

1

A

0X

X

X

X

X

X

X

e

t

y

b

a

t

a

d

e

t

y

b

s

s

e

r

d

d

a

e

v

a

l

s

SP

e

t

y

b

d

r

3

e

t

y

b

d

n

2

e

t

y

b

t

s

1

ASP

A write operation (see Table 3) requires a Start condition, followed by a valid slave address byte, a valid address byte

00h, a data byte and a STOP condition. After each of the three bytes the DP7132 responds with an acknowledge.

At this time the data is written only to volatile registers, then the device enters its standby state.

An increment operation (see Table 4) requires a Start condition, followed by a valid increment address byte (01011),

a valid address byte 00h. After each of the two bytes, the DP7132 responds with an acknowledge. At this time if the

data is high then the wiper is incremented or if the data is low the wiper is decremented at each clock. Once the stop

is issued then the device enters its standby state with the WCR data as being the last inc/dec position. Also, the wiper

position does not roll over but is limited to min and max positions.

A read operation (see Table 5) requires a Start condition, followed by a valid slave address byte for write, a valid address

byte 00h, a second START and a second slave address byte for read. After each of the three bytes, the DP7132

responds with an acknowledge and then the device transmits the data byte. The master terminates the read operation

by issuing a STOP condition following the last bit of Data byte.

Table 3. WCR Write Operation

Table 4. WCR Increment/Decrement Operation

Table 5. WCR Read Operation