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AR0135CS Datasheet(PDF) 21 Page - ON Semiconductor

Part # AR0135CS
Description  1/3?릋nch 1.2 Mp CMOS Digital Image Sensor
PDF  27 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

AR0135CS Datasheet(HTML) 21 Page - ON Semiconductor

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AR0135CS
www.onsemi.com
21
POWER-ON RESET AND STANDBY TIMING
Power-Up Sequence
The recommended power-up sequence for the AR0135CS
is shown in Figure 19. The available power supplies
(VDD_IO, VDD, VDD_SLVS, VDD_PLL, VAA, VAA_PIX)
must have the separation specified below.
1. Turn on VDD_PLL power supply.
2. After 0–10
ms, turn on VAA and VAA_PIX power
supply.
3. After 0–10
ms, turn on VDD_IO power supply.
4. After the last power supply is stable, enable
EXTCLK.
5. If RESET_BAR is in a LOW state, hold
RESET_BAR LOW for at least 1 ms.
If RESET_BAR is in a HIGH state, assert
RESET_BAR for at least 1 ms.
6. Wait 160000 EXTCLKs (for internal initialization
into software standby).
7. Configure PLL, output, and image settings to
desired values.
8. Wait 1 ms for the PLL to lock.
9. Set streaming mode (R0x301A[2] = 1).
Figure 19. Power Up
EXTCLK
VDD_SLVS (0.4)
VAA_PIX
VAA (2.8)
VDD_IO (1.8/2.8)
VDD (1.8)
VDD_PLL (2.8)
t0
t1
t2
t3
t4
t5
t6
tX
Hard
Reset
Internal
Initialization
Software
Standby
PLL Clock
Streaming
RESET_BAR
Table 18. POWER-UP SEQUENCE
Symbol
Definition
Min
Typ
Max
Unit
t0
VDD_PLL to VAA/VAA_PIX
0
10
ms
t1
VAA/VAA_PIX to VDD_IO
0
10
ms
t2
VDD_IO to VDD
0
10
ms
t3
VDD to VDD_SLVS
0
10
ms
tX
Xtal Settle Time
30 (Note 1)
ms
t4
Hard Reset
1 (Note 2)
ms
t5
Internal Initialization
160000
EXTCLKs
t6
PLL Lock Time
1
ms
1. Xtal settling time is component-dependent, usually taking about 10–100 ms.
2. Hard reset time is the minimum time required after power rails are settled. In a circuit where hard reset is held down by RC circuit, then the
RC time must include the all power rail settle time and Xtal settle time.
3. It is critical that VDD_PLL is not powered up after the other power supplies. It must be powered before or at least at the same time as the
others. If the case happens that VDD_PLL is powered after other supplies then the sensor may have functionality issues and will experience
high current draw on this supply.



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