IW3614 datasheet(9/18 Pages) DIALOG

9 / 18 page

Rev. 0.7

iW3614

Page 9

PReliminaRy

iW3614

AC/DC Digital Power Controller for

High Power Factor Dimmable LED Drivers

AC line after

Wall-dimmer

AC line before Wall-

dimmer

Figure 9.2 : Trailing-Edge Wall Dimmer Waveforms

Dimmer detection, or discovery, takes place during the third

cycle after start-up. The controller determines whether no

dimmer exists, or there is a leading edge dimmer or a trailing

edge dimmer.

CROSS is internally generated by comparing the digitalized

IN signal to the threshold of 0.25V during dimming or

0.14V without a dimmer. The V

IN period (tPERIOD) is measured

between two consecutive rising edge zero-crossings. t

CROSS

is generated by the internal digital block (refer to Figure 9.3);

when V

IN_A is higher than 0.14V tCROSS is set to high and

when V

IN_A falls below 0.14V tCROSS is reset to zero. If tCROSS is

much shorter than the V

IN period then a dimmer is detected.

The controller uses the filtered derivatives to decide which

type of dimmer is present. A large positive derivative value

indicates a leading edge dimmer. Then the controller enters

leading edge dimmer mode; otherwise it enters trailing edge

dimmer mode.

During the dimmer detection stage, the OUTPUT(TR) keeps

high to turn on the switch FET in the chopping circuit. This

creates a resistive load for the wall dimmer.

0.14 V

OUTPUT(TR)

LED(EN)

VLED

VCROSS

VIN_A

tCROSS

tperiod

Figure 9.3 : Dimmer Detection

9.3 Dimmer Tracking and Phase

Measurements

The dimmer detection algorithm and the dimmer tracking

algorithm both depend on an accurate input voltage

period measurement. The V

IN period is measured during

the second cycle of the dimmer detection process and is

latched for use thereafter. Using the measured V

IN period

in subsequent calculations rather than a constant allows

for automatic 50-/60-Hz operation and allows for a 10%

frequency variation.

The phase measurement starts when V

IN exceeds the rising

threshold until V

IN falls below the falling threshold.

VCROSS

PERIOD

CROSS

0.14 V

Figure 9.4 : Dimmer Phase Measurement

The dimmer phase is calculated as:

Dimmer Phase

CROSS

PERIOD

(9.1)

The calculated dimmer phase is used to generate the signal

RATIO, which determines LED current. If the dimmer phase

is less than 0.14 then the D

RATIO is clamped at 0.14; if the

dimmer phase is greater than 0.7 then D

RATIO is clamped at

1.0; otherwise D

RATIO is calculated by equation 9.2.

Dimmer Phase

RATIO

×−

(9.2)

Where, K

1 is set to 1.768 and K2 is set to 0.238.

Using V

Isense(NOM) to represent the nominal 100% LED current,

the V

Isense, which modulates the output LED current, is

controlled by:

()

Isense

Isense NOM

RATIO

(9.3)

When D

RATIO is 1, the converter outputs 100% of nominal

power to the LED. If D

RATIO is 0.01, the converter outputs 1%

of nominal power to the LED.

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