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MIC24045 Datasheet(PDF) 23 Page - Microchip Technology

Part # MIC24045
Description  I2C Programmable, 4.5V-19V Input, 5A Step-Down Converter
PDF  46 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC24045 Datasheet(HTML) 23 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005568A-page 23
MIC24045
5.1
STATUS Register
In the read-only STATUS registers, diagnostic informa-
tion is provided. Bits can be F = latched (Flag) or
S = non-latched (Status).
Flag bits are set when the corresponding Fault condi-
tion has occurred and do not return-to-zero once the
Fault condition has ceased. Flags can only be cleared
by writing ‘1’ in Bit 0 of the COMMAND register 4h, or
by power cycling. Status bits are set when the corre-
sponding Fault condition has occurred and return to
zero automatically once the Fault condition has
ceased.
Default bits value at power-up is zero, except for Bit 2
(which will always be read as ‘1’) and Bit 1, which is ‘1’
if no Fault conditions are detected.
REGISTER 5-1:
STATUS – STATUS REGISTER (ADDRESS 0h)
R-0
R-0
R-0
R’0’
R-0
R’1’
R-1
R-0
OCF
ThSDF
ThWrnF
Reserved
EnS
Reserved
Reserved
PGS
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
RC = Read-then-clear bit
bit 7
OCF:
Over-Current Flag bit. OCF is set high whenever an over-current event occurs. Latched.
bit 6
ThSDF:
Thermal Shut-down Flag bit. ThSDF is set high whenever a Thermal Shutdown occurs.
Latched.
bit 5
ThWrnF:
Thermal Warning Flag bit. ThWrnF is set high whenever a Thermal Warning occurs.
Latched.
bit 4
Reserved:
Flag bit. Always read as zero.
bit 3
EnS:
Enable Pin Status bit. EnS reflects the logic value present on pin EN. Non-latched.
bit 2
Reserved:
Status bit. Always read as ‘1’.
bit 1
Reserved:
Default status at POR is ‘1’ (no faults detected).
bit 0
PGS:
Power-Good Status bit. PGS reflects the logic value present on pin PG. Non-latched.
REGISTER 5-2:
SETTING 1 – SETTING 1 REGISTER (ADDRESS 1h)
RW-V
RW-V
RW-V
RW-V
RW-V
U-0
U-0
U-0
ILIM1
ILIM0
Freq2
Freq1
Freq0
Reserved
Reserved
Reserved
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
RC = Read-then-clear bit
V = factory-programmed POR value(1)
Note 1:
Default Status settings at power-up can be changed at the factory. Standard selections are described in
Section 6.0 “MIC24045 Default Settings Values at Power-Up”
. Overwriting default settings by I2C has
no permanent effect and values will return to factory default values upon power cycling.
2:
Changing Setting 1 Register values while power delivery is enabled is not recommended. To change set-
tings by I2C, set EN pin low first, then write the new configuration, and finally, set EN pin high again to
resume power delivery.



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