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MIC24045 Datasheet(PDF) 38 Page - Microchip Technology |
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MIC24045 Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 46 page ![]() MIC24045 DS20005568A-page 38 2016 Microchip Technology Inc. 8.5.4 BLOCK READ (AUTO INCREMENT MODE) This command reads a block of bytes, starting from a designated register that is specified through the com- mand byte. Bit<6> of the command byte indicates the Auto-Increment mode. If this bit is set, the address gets incremented by one automatically and the registers are read in order, starting from the address provided by the command byte. The Block/Auto-Increment Read command is as follows and it is illustrated in the timing diagram of Figure 8-6. 1. Send START sequence 2. Send 7-bit slave address 3. Send the R/W bit - 0 to indicate a write operation 4. Wait for acknowledge from the slave 5. Send the command byte – address that needs to be read with Bit<6> set high to indicate the Auto-Increment Read mode. 6. Wait for acknowledge from the slave 7. Send START sequence again 8. Send the 7-bit slave address 9. Send R/W bit - 1 to indicate a read operation 10. Wait for acknowledge from the slave 11. Receive the 8-bit data from the slave register indicated in step 5, starting from MSB 12. Acknowledge from the master receiver. On the last byte, master receiver issues a NACK in place of ACK to signal the end of the data transfer. 13. Repeat steps 11 and 12 until last byte 14. STOP sequence is sent FIGURE 8-6: Block Read Timing Diagram. In Block Read Auto-Increment mode, the master receiver must signal an end-of-data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. If the master keeps reading beyond the valid user-accessible register locations, the content of inter- nal test registers will be streamed out until location 15 (Fh) is reached. After that, the read operation wraps-around and restarts from register location 0h and so on, until the master stops reading. SDA S 0 A A START condition ACK from Slave Slave address Command byte ACK from Slave Sr 1 A A (repeated) START condition R/W ACK from Slave Slave address Data from register X+n STOP condition DATA (first byte) R/W At this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter P * * * (cont.) * * * 1 (cont.) * * * A Data from register X DATA (first byte) Data from register X+1 DATA (first byte) A Note: If the master is using a non-existing regis- ter location in the command byte, a reject (NACK) will be generated by the MIC24045. |
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