PI3749 datasheet(15/26 Pages) VICOR

15 / 26 page

Cool-Power® ZVS Switching Regulators

Rev 1.6

vicorpower.com

Page 15 of 26

09/2016

800 927.9474

PI3749-x0

Functional Description

The PI3749-x0 is part of a family of highly integrated ZVS Buck-

Boost regulators. The PI3749-x0 has a variable output voltage

that is set with a resistive divider. Performance and maximum

output current are characterized with a specific external power

inductor as defined in electrical specifications, with Inductor

Pairing section.

For basic operation, Figure 24 shows the minimum connections

and components required.

Enable

The EN pin of the regulator is referenced to SGND and permits

the user to turn the regulator on or off. The EN polarity is a

positive logic assertion. If the EN pin is left floating or asserted

high, the regulator output is enabled. Pulling the EN pin below

0.8VDC with respect to SGND will discharge the SS/TRK pin until

the output reaches zero or the EN pin is released.

Switching Frequency Synchronization

The SYNCI input allows the user to synchronize the controller

switching frequency to the falling edge of an external clock

referenced to SGND. The external clock can synchronize the

unit between 50% and 110% of the preset switching frequency

(FSW). The SYNCI pin should be connected to SGND when not in

use, and should never be left floating.

Soft-Start and Tracking

The PI3749-x0 provides a soft start and tracking feature using

the TRK pin. Programmable Soft Start requires an external

capacitor from the TRK pin to SGND in addition to the internal

47nF soft-start capacitor to set the start-up ramp period greater

then tSS. The PI3749-x0 output will proportionately follow the

TRK pin when it is below 1.7VDC. If the TRK pin is goes below the

disable threshold, the regulator will finish the current switching

cycle and then stop switching.

Remote Sensing Differential Amplifier

A general purpose operational amplifier is provided to assist

with differential remote sensing and or level shifting of the

output voltage. The VDIFF pin can be connected to the

transconductance error amplifier input EAIN pin, or with proper

configuration can also be connected to the EAO pin to drive the

modulator directly.

Power Good

The PI3749-x0 PGD pin functions as a power good indicator and

pulls low when the regulator is not operating or if EAIN is less

than 1.4V.

Output Current Limit Protection

PI3749-x0 has three methods implemented to protect from

output short circuit or over current condition.

Slow Current Limit protection: prevents the output load from

sourcing current higher than the maximum rated regulator

current. If the output current exceeds the Vout Slow Current

Limit (VOUT_SCL) a slow current limit fault is initiated and the

regulator is shutdown which eliminates output current flow.

After Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated.

This restart cycle will be repeated indefinitely until the excessive

load is removed.

Fast Current Limit protection: monitors the regulator inductor

current pulse-by-pulse to prevent the output from supplying

very high current. If the regulator senses a high inductor current

pulse, it will initiate a fault and stop switching. After Fault Restart

Delay (tFR_DLY), a soft-start cycle is initiated. This restart cycle will

be repeated indefinitely until the excessive load is removed.

Overload Timeout protection: If the regulator is providing

maximum output power for longer than the Overload Timeout

delay (TOL), it will initiate a fault and stop switching. After Fault

Restart Delay (tFR_DLY), a soft-start cycle is initiated. This restart

cycle will be repeated indefinitely until the overload load

is removed.

Input Undervoltage Lockout

If VIN falls below the input Under Voltage Lockout (UVLO)

threshold, the PI3749-x0 will complete the current cycle and

stop switching. The system will restart once the input voltage is

reestablished and after the Fault Restart Delay.

Input Overvoltage Lockout

If VIN rises above the input Overvoltage Lockout (OVLO)

threshold, the PI3749-x0 will complete the current cycle and

stop switching. The system will restart once the input voltage is

reestablished and after the Fault Restart Delay.

Output Overvoltage Protection

The PI3749-x0 family is equipped with two methods of detecting

an output overvoltage condition. Output Overvoltage Protection

(OVP) to prevent damage to input voltage sensitive devices. If

the output voltage exceeds 20% of its set regulated value as

measured by the EAIN pin (VEAIN_OV), the regulator will complete

the current cycle, stop switching and issue an OVP fault. Also if

the output voltage of the regulator exceeds the VOUT Overvoltage

Threshold (VOUT_OVT) then the regulator will complete the current

cycle, stop switching and issue an OVP fault. The system will

resume operation once the output voltage falls below the OVP

threshold and after Fault Restart Delay.

SGND

Vin

VOUT

Vout

PGND

COMP

ISP

ISN

IMON

EAO

Cin

Cout

PGND

VS1

VS2

VSN

VSP

VDIFF

EAIN

SYNCI

VDR

SYNCO

TRK

PGD

PI3749-00

Figure 24 — ZVS Buck-Boost with required components

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