10

TH6503 USB Low-Speed Interface

Register

Description

The StatusRegister, CntOutRegister and the OUT FIFO can only be read by the microcontroller.

The internal Registers of the TH6503 can only be written by the microcontroller.

StatusRegister (read only)

always the first byte of a data out transfer

is loaded in the out shift register with the falling edge of an pulse on SDI with SIN=0

Bit

Number

Bit

Mnemonic

Reset

Status

Function

7

HWR

1

Hardware Reset

?

?

is set if the reset source is POR, RESET pin or low voltage reset

is reset automatically on reading the StatusRegister and also by the following

SW-Reset before reading the StatusRegister

6

RES

0

USB Reset

?

?

?

is set so long as a reset is received on the USB (SW reset)

is reset automatically on reading the StatusRegister and also by the following

HW-Reset before reading the StatusRegister

the reset of this bit enables EP0 Out and EP0 In (EO0 and EI0 bits in the

SerialFlag Register are set)

5

ACT

0

USB Activity

?

?

?

?

is set when the USB is active (all bus states exept IDLE)

is reset automatically on reading the StatusRegister

can be used by the microcontroller to calculate the suspend time

if set the SO and SMC bits in the BridgeConfigRegister are reset

4

RDT

0

USB Resume Detect

?

?

?

is set automatically if a resume status has been decoded

is reset automatically if the resume status has been terminated

if set the SO and SMC bits in the BridgeConfigRegister are reset

3

ID12

0

EP1/2 IN Done

?

?

is set if the data requested by an IN token have been completely

transmitted to the USB host and an ACK has been received

is reset with the falling SIN edge (end of IN transfer)

2

ID0

0

EP0 IN Done

?

?

is set if data requested by an IN token have been completely

transmitted to the USB host and an ACK has been received

is reset with the falling SIN edge (end of IN transfer)

1

OD

0

OUT Done

?

?

is set automatically if the data are complete in the FIFO after a valid

SETUP or OUT token has been received and an ACK has been sent

to the USB host

is reset with the rising SIN edge (end of OUT transfer)

0

WA

1

WAKE Activity

?

?

is set and reset automatically depending on the voltage level at the

WAKE pin

is an inverted copy of the WAKE pin and can be used as low active

interrupt output, when SIN = 1