PCA9501 datasheet(16/22 Pages) PHILIPS

16 / 22 page

Philips Semiconductors

Product data

PCA9501

8-bit I2C and SMBus I/O port with interrupt,

2-kbit EEPROM and 6 address pins

2003 Sep 12

NON-VOLATILE STORAGE SPECIFICATIONS

PARAMETER

SPECIFICATION

Memory cell data retention

10 years minimum

Number of memory cell write cycles

100,000 cycles minimum

I2C-BUS TIMING CHARACTERISTICS

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

I2C-bus timing (see Figure 22; Note 1)

fSCL

SCL clock frequency

—

400

kHz

tSW

tolerable spike width on bus

—

tBUF

bus free time

1.3

—

µs

tSU;STA

START condition set-up time

0.6

—

µs

tHD;STA

START condition hold time

0.6

—

µs

SCL and SDA rise time

—

0.3

µs

SCL and SDA fall time

—

0.3

µs

tSU;DAT

data set-up time

250

—

tHD;DAT

data hold time

—

tVD;DAT

SCL LOW to data out valid

—

1.0

µs

tSU;STO

STOP condition set-up time

0.6

—

µs

NOTE:

1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input

voltage swing of VSS to VDD.

PORT TIMING CHARACTERISTICS

SYMBOL

PARAMETER

MIN

TYP

MAX

UNIT

tpv

Output data valid; CL ≤ 100 pF

—

µs

tps

Input data setup time; CL ≤ 100 pF

—

µs

tph

Input data hold time; CL ≤ 100 pF

—

µs

tiv

Interrupt input data valid time; CL ≤ 100 pF

—

µs

tir

Interrupt reset time; CL ≤ 100 pF

—

µs

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