DSP56300FMSLASHAD datasheet(6/128 Pages) MOTOROLA

6 / 128 page

PRELIMINARY

Freescale Semiconductor

Signal Groupings

3.3

SCAN

3.4

Clock and PLL

3.5

Interrupt and Mode Control

The interrupt and mode control signals select the chip’s operating mode as it comes out of hardware reset. After RESET is de-

asserted, these inputs are hardware interrupt request lines.

Table 6. SCAN signals

Signal

Name

Type

State

during

Reset

Signal Description

SCAN

Input

SCAN—Manufacturing test pin. This pin must be connected to ground.

Table 7. Clock and PLL Signals

Signal

Name

Type

State

during

Reset

Signal Description

EXTAL

Input

External Clock / Crystal Input—An external clock source must be connected

to EXTAL in order to supply the clock to the internal clock generator and PLL.

XTAL

Output

Chip Driven Crystal Output—Connects the internal Crystal Oscillator output to an

external crystal. If an external clock is used, leave XTAL unconnected.

PINIT/NMI

Input

PLL Initial/Nonmaskable Interrupt—During assertion of RESET, the value of

PINIT/NMI is written into the PLL Enable (PEN) bit of the PLL control

de-assertion and during normal instruction processing, the PINIT/NMI

Schmitt-trigger input is a negative-edge-triggered nonmaskable interrupt

(NMI) request internally synchronized to the internal system clock.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

Table 8. Interrupt and Mode Control

Signal Name

Type

State

during

Reset

Signal Description

MODA/IRQA

Input

MODA

Input

Mode Select A/External Interrupt Request A—MODA/IRQA is an

active-low Schmitt-trigger input, internally synchronized to the DSP

clock. MODA/IRQA selects the initial chip operating mode during

hardware reset and becomes a level-sensitive or negative-edge-

triggered, maskable interrupt request input during normal instruction

processing. This pin can also be programmed as GPIO. MODA, MODB,

MODC, and MODD select one of 16 initial chip operating modes,

latched into the OMR when the RESET signal is de-asserted. If the

processor is in the stop standby state and the MODA/IRQA pin is pulled

to GND, the processor will exit the stop state.

This pin has an internal pull up resistor.

This input is 5 V tolerant.

DSP56300FM/AD Datasheet(PDF) 6 Page - Motorola, Inc

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