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DS1992 Datasheet(PDF) 6 Page - Dallas Semiconductor

Part # DS1992
Description  1kbit/4kbit Memory iButtonTM DS1994 4-kbit Plus Time Memory iButtonTM
PDF  17 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1992 Datasheet(HTML) 6 Page - Dallas Semiconductor

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DS1992/DS1993
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Copy Scratchpad [55h]
This command is used to copy data from the scratchpad to memory. After issuing the copy scratchpad
command, the user must provide a 3-byte authorization pattern. This pattern must exactly match the data
contained in the three address registers (TA1, TA2, E/S, in that order). If the pattern matches, the AA
(Authorization Accepted) flag is set and the copy begins. A logic 0 is transmitted after the data has been
copied until the user issues a reset pulse. Any attempt to reset the part is ignored while the copy is in
progress. Copy typically takes 30
ms.
The data to be copied is determined by the three address registers. The scratchpad data from the
beginning offset through the ending offset is copied to memory, starting at the target address. Anywhere
from 1 to 32 Bytes can be copied to memory with this command. Whole Bytes are copied even if only
partially written. The AA flag is cleared only by executing a write scratchpad command.
Read Memory [F0h]
The read memory command can be used to read the entire memory. After issuing the command, the user
must provide the 2-Byte target address. After the two Bytes, the user reads data beginning from the target
address and may continue until the end of memory, at which point logic 1’s are read. It is important to
realize that the target address registers contains the address provided. The ending offset/data status Byte
is unaffected.
The hardware of the DS1992/DS1993 provides a means to accomplish error-free writing to the memory
section. To safeguard reading data in the 1-Wire environment and to simultaneously speed up data
transfers, it is recommended to packetize data into data packets of the size of one memory page each.
Such a packet would typically store a 16-bit CRC with each page of data to ensure rapid, error-free data
transfers that eliminate having to read a page multiple times to determine if the received data is correct or
not. (See Application Note 114 for the recommended file structure to be used with the 1-Wire
environment.)



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