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DS1992 Datasheet(PDF) 17 Page - Dallas Semiconductor |
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DS1992 Datasheet(HTML) 17 Page - Dallas Semiconductor |
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17 / 17 page ![]() DS1992/DS1993 17of 17 Note 1: All voltages are referenced to ground. Note 2: VIH is a function of the external pullup resistor and the VCC power supply. Note 3: VPUP = external pullup voltage. Note 4: Input load is to ground. Note 5: Capacitance on the data line could be 800pF when power is first applied. If a 5k W resistor is used to pull up the data line to VPUP, 5 ms after power has been applied, the parasite capacitance does not affect normal communications. Note 6: Guaranteed by design, not production tested. Note 7: Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is guaranteed to be valid within 1 ms of this falling edge, and remains valid for 14ms minimum. (15 ms total from falling edge on 1-Wire bus.) Note 8: An additional reset or communication sequence cannot begin until the reset high time has expired. Note 9: The reset low time (tRSTL) should be restricted to a maximum of 960 ms, to allow interrupt signaling; otherwise it could mask or conceal interrupt pulses. |
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