IR22141 datasheet(26/28 Pages) IRF

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IR2214/IR22141(SS)

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ADVANCE DATA

PCB LAYOUT TIPS

Distance from H to L voltage

The IR2214 pin out maximizes the distance be-

tween floating (from DC- to DC+) and low voltage

pins. It’s strongly recommended to place com-

ponents tied to floating voltage in the high volt-

age side of device (V

B, VS side) while the other

components in the opposite side.

Ground plane:

Ground plane must not be placed under or

nearby the high voltage floating side to minimize

noise coupling.

Gate drive loops:

Current loops behave like an antenna able to re-

ceive and transmit EM noise. In order to reduce

EM coupling and improve the power switch turn

on/off performances, gate drive loops must be

reduced as much as possible. Figure 23 shows

the high and low side gate loops.

Moreover, current can be injected inside the gate

drive loop via the IGBT collector-to-gate parasitic

capacitance. The parasitic auto-inductance of the

gate loop contributes to develop a voltage across

the gate-emitter increasing the possibility of self

turn-on effect. For this reason is strongly recom-

mended to place the three gate resistances close

together and to minimize the loop

area (see figure 23).

gate

resistance

VS/COM

VB/ VCC

H/LOP

H/LON

SSDH/L

VGE

Gate Drive

Loop

CGC

IGC

Figure 23

: gate drive loop

Supply capacitors:

IR2214 output stages are able to quickly turn on

IGBT with up to 2 A of output current. The sup-

ply capacitors must be placed as close as pos-

sible to the device pins (V

CC and VSS for the

ground tied supply, V

B and VS for the floating

supply) in order to minimize parasitic inductance/

resistance.

Routing and placement example:

Figure 24 shows one of the possible layout solu-

tions using a 3 layer PCB. This example takes

into account all the previous considerations.

Placement and routing for supply capacitors and

gate resistances in the high and low voltage side

minimize respectively supply path and gate drive

loop. The bootstrap diode is placed under the

device to have the cathode as close as possible

to bootstrap capacitor and the anode far from

high voltage and close to V

CC.

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